Texas Instruments OMAP36 Series, Technical Reference Manual

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MMC/SD/SDIO Register Manual
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Bits Field Name Description Type Reset
31:0 DATA Data Register [31:0] RW 0x00000000
In functional mode (MMCI. MMCHS_CON [4] MODE bit set to the default value
0):
A read access to this register is allowed only when the buffer read enable
status is set to 1 (MMCi.
MMCHS_PSTATE [11] BRE bit), otherwise a bad
access (MMCi. MMCHS_STAT [29] BADA bit) is signaled.
A write access to this register is allowed only when the buffer write enable
status is set to 1 (MMCi.
MMCHS_PSTATE [10] BWE bit), otherwise a bad
access (MMCi. MMCHS_STAT [29] BADA bit) is signaled and the data is not
written.
Table 24-62. Register Call Summary for Register MMCHS_DATA
MMC/SD/SDIO Functional Description
• Data Buffer : [0] [1] [2] [3] [4] [5] [6] [7]
• Transfer or Command Status and Error Reporting : [8]
MMC/SD/SDIO Register Manual
• MMC/SD/SDIO Register Summary : [9]
• MMCHS Registers : [10] [11] [12] [13]
Table 24-63. MMCHS_PSTATE
Address Offset 0x124
Physical Address 0x4809 C124 Instance MMCHS1
0x480A D124 MMCHS3
0x480B 4124 MMCHS2
Description Present state register.
The Host can get status of the Host Controller from this 32-bit read only register.
Type R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved DLEV Reserved Reserved
DLA
RTA BRE
WTA BWE DATI
CMDI CLEV
Reserved Reserved Reserved
Bits Field Name Description Type Reset
31:25 Reserved Reserved bit field. Do not write any value. R 0x00
24 CLEV mmci_cmd line signal level. R -
This status is used to check the mmci_cmd line level to recover from
errors, and for debugging.
The value of this register after reset depends on the mmci_cmd line level
at that time.
Read 0x0: The mmci_cmd line level is 0.
Read 0x1: The mmci_cmd line level is 1.
23:20 DLEV mmci_dat[3:0] line signal level R 0x-
mmci_dat[3] => bit 23
mmci_dat[2] => bit 22
mmci_dat[1] => bit 21
mmci_dat[0] => bit 20
This status is used to check mmci_dat line level to recover from errors, and
for debugging. This is especially useful in detecting the busy signal level
from mmci_dat[0].
The value of these registers after reset depends on the mmci_dat lines
level at that time.
19 Reserved Reserved bit field. Do not write any value R 0
18 Reserved Reserved bit field. Do not write any value R 1
This bit is not affected by soft reset.
3442 MMC/SD/SDIO Card Interface SWPU177N – December 2009 – Revised November 2010
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