Texas Instruments OMAP36 Series, Technical Reference Manual

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Memory Mapping
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Table A-2. L4-Core Memory Space Mapping
(1)
(continued)
Device Name Start Address End Address Size Description
(Hex) (Hex)
Reserved 0x480A F000 0x480A FFFF 4KB Reserved
Reserved 0x480B 0000 0x480B 0FFF 4KB Reserved
0x480B 1000 0x480B 1FFF 4KB Reserved
HDQ/1-Wire 0x480B 2000 0x480B 2FFF 4KB Module
0x480B 3000 0x480B 3FFF 4KB L4 interconnect
MMC/SD/SDIO2 0x480B 4000 0x480B 4FFF 4KB Module
0x480B 5000 0x480B 5FFF 4KB L4 interconnect
ICR MPU port 0x480B 6000 0x480B 6FFF 4KB Module
(chassis mode only)
0x480B 7000 0x480B 7FFF 4KB L4 interconnect
McSPI3 0x480B 8000 0x480B 8FFF 4KB Module
0x480B 9000 0x480B 9FFF 4KB L4 interconnect
McSPI4 0x480B A000 0x480B AFFF 4KB Module
0x480B B000 0x480B BFFF 4KB L4 interconnect
Camera ISP 0x480B C000 0x480B FFFF 16KB Camera ISP
0x480C 0000 0x480C 0FFF 4KB L4 interconnect
Reserved 0x480C 1000 0x480C 8FFF 32KB Reserved
SR1 0x480C 9000 0x480C 9FFF 4KB Module
0x480C A000 0x480C AFFF 4KB L4 interconnect
SR2 0x480C B000 0x480C BFFF 4KB Module
0x480C C000 0x480C CFFF 4KB L4 interconnect
ICR modem port 0x480C D000 0x480C DFFF 4KB Module
(chassis mode only)
0x480C E000 0x480C EFFF 4KB L4 interconnect
Reserved 0x480C F000 0x482F FFFF 2208KB Reserved
L4-Wakeup interconnect (region A) 0x4830 0000 0x4830 9FFF 40KB Nonshared device mapping
Control module ID code 0x4830 A000 0x4830 AFFF 4KB See Section A.2.2.2.2 .
0x4830 B000 0x4830 BFFF 4KB L4 interconnect
L4-Wakeup interconnect (region B) 0x4830 C000 0x4833 FFFF 208KB See Section A.2.2.2.2 .
0x4834 0000 0x4834 0FFF 4KB L4 interconnect
Reserved 0x4834 1000 0x48FF EFFF 13,052KB Reserved
A.2.2.2.2 L4-Wakeup Memory Space Mapping
L4-Wakeup memory space mapping does not include modules unsupported in the OMAP36xx in CYN
package devices. See the Memory Mapping chapter in the OMAP36xx TRM.
A.2.2.2.3 L4-Peripheral Memory Space Mapping
The L4-Per interconnect is a 1-MB space composed of the L4-Per interconnect configuration registers and
the module registers.
Table A-3 describes the mapping of the registers for the L4-Per interconnect.
NOTE: All memory spaces described as modules provide direct access to the module registers
outside the L4-Per interconnect. All other accesses are internal to the L4-Per interconnect.
3656 OMAP36xx Multimedia Device in CYN Package SWPU177N – December 2009 – Revised November 2010
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