Texas Instruments OMAP36 Series, Technical Reference Manual

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Camera ISP Basic Programming Model
To obtain this mapping between the input and output pixels, the following settings apply:
- CCDC_FMTCFG [3:2] LNUM = 0 Converts to 1 line
- CCDC_FMTCFG [11:8] PLEN_EVEN = 0 1 program entry
- CCDC_FMTCFG [7:4] PLEN_ODD = 0 1 program entry
- CCDC_FMT_ADDR_i [25:24] LINE (i = 0) = 0 Init ADDR0 pointer to 0th line
- CCDC_FMT_ADDR_i [12:0] INIT (i = 0) = 0 Init ADDR0 index to 0th pixel
- CCDC_PRGEVEN0 [3:0] EVEN0 = 0 Even prog entry 0: ADDR0++
- CCDC_PRGODD0 [3:0] ODD0 = 0 Odd prog entry 0: ADDR0++
- CCDC_VP_OUT [3:0] HORZ_ST = 0 Horizontal start
- CCDC_VP_OUT [16:4] HORZ_NUM = 0 Horizontal size
The program for even and odd lines is executed as follows. Because there is only one program entry, this
instruction is executed repeatedly.
ADDR0= (0, 0)
While not end_of_line
{
Write incoming pixel to ADDR0
ADDR0+=(1,0)
}
Example 6-3. Dual readout pattern: 1 input line = 1 output line
The following input-to-output mapping (see Table 6-64 ) corresponds to a conventional dual readout
pattern. One input line corresponds to 1 output line; the output can be as large as 4x1376 pixels.
Table 6-64. Camera ISP CCDC Dual Readout Pattern 1 to 1
Input Pixels order in input line
Line [i] 0 1 2 3 [...] 4092 4093 4094 4095
Output Pixels order in output line
Line [i] 0 2 4 6 [...] 7 5 3 1
To obtain this mapping between the input and output pixels, the following settings apply:
- CCDC_FMTCFG [3:2] LNUM = 0 Converts to 1 line
- CCDC_FMTCFG [11:8] PLEN_EVEN = 1 2 program entry
- CCDC_FMTCFG [7:4] PLEN_ODD = 1 2 program entry
- CCDC_FMT_ADDR_i [25:24] LINE (i = 0) = 0 Init ADDR0 pointer to 0th line
- CCDC_FMT_ADDR_i [12:0] INIT (i = 0) = 0 Init ADDR0 index to 0th pixel
- CCDC_FMT_ADDR_i [25:24] LINE (i = 1) = 0 Init ADDR1 pointer to 0th line
- CCDC_FMT_ADDR_i [12:0] INIT (i = 1) = 4095 Init ADDR1 index to 4095th pixel
- CCDC_PRGEVEN0 [3:0] EVEN0 = 0 Even prog entry 0: ADDR0++
- CCDC_PRGEVEN0 [7:4] EVEN1 = 3 Even prog entry 1: ADDR1- -
- CCDC_PRGODD0 [3:0] ODD0 = 0 Even prog entry 0: ADDR0++
- CCDC_PRGODD0 [7:4] ODD1 = 3 Even prog entry 1: ADDR1- -
- CCDC_VP_OUT [3:0] HORZ_ST = 0 Horizontal start
- CCDC_VP_OUT [16:4] HORZ_NUM = 0 Horizontal size
ADDR0=(0,0)
ADDR1=(4095,0)
While not end_of_line
{
Write incoming pixel to ADDR0
ADDR0+= (1,0)
Write incoming pixel to ADDR1
1275 SWPU177N – December 2009 – Revised November 2010 Camera Image Signal Processor
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