Public Version
UART/IrDA/CIR Register Manual
www.ti.com
Bits
Field Name
Description
Type
Reset
31:8
Reserved
Read returns 0x00.
R
0x000000
7
NCD_STS
In loopback mode, it is equivalent to
R
-
6
NRI_STS
This bit is the complement of the nRI input. In loopback
R
-
mode, it is equivalent to
5
NDSR_STS
In loopback mode, it is equivalent to
R
-
4
NCTS_STS
This bit is the complement of the nCTS input. In loopback
R
-
mode, it is equivalent to
3
DCD_STS
Indicates that
[3] in loopback changed.
R
0
Cleared on a read.
2
RI_STS
Indicates that nRI input (or
[2] in loopback)
R
0
changed state from low to high. Cleared on a read.
1
DSR_STS
R
0
0x1:
Indicates that
[0] in loopback changed
state. Cleared on a read.
0
CTS_STS
R
0
0x1:
Indicates that nCTS input (or
[1] in
loopback) changed state. Cleared on a read.
Table 19-72. Register Call Summary for Register MSR_REG
UART/IrDA/CIR Environment
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:
UART/IrDA/CIR Functional Description
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•
UART/IrDA (SIR, MIR, FIR)/CIR Mode Selection
•
UART/IrDA/CIR Register Manual
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UART/IrDA/CIR Register Summary
•
UART/IrDA/CIR Register Description
:
Table 19-73. SPR_REG
Address Offset
0x01C
Physical Address
See
to
Description
Scratchpad register
This read/write register does not control the module. It is a scratchpad register used by the programmer to hold
temporary data.
Type
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
SPR_WORD
Bits
Field Name
Description
Type
Reset
31:8
Reserved
Read returns 0x00.
R
0x000000
7:0
SPR_WORD
Scratchpad register
RW
0x00
Table 19-74. Register Call Summary for Register SPR_REG
UART/IrDA/CIR Functional Description
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•
UART/IrDA (SIR, MIR, FIR)/CIR Mode Selection
[4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
UART/IrDA/CIR Register Manual
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UART/IrDA/CIR Register Summary
2950UART/IrDA/CIR
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated