Texas Instruments OMAP36 Series, Technical Reference Manual

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UART/IrDA/CIR Register Manual
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Bits Field Name Description Type Reset
3 CD_STS_CH RW 0
0x0: In loopback, forces nDCD input high and IRQ outputs
to INACTIVE state.
0x1: In loopback, forces nDCD input low and IRQ outputs
to INACTIVE state.
2 RI_STS_CH RW 0
0x0: In loopback, forces nRI input inactive (high).
0x1: In loopback, forces nRI input active (low).
1 RTS In loop back, controls MSR_REG [4].If auto-RTS is enabled, RW 0
the nRTS output is controlled by hardware flow control.
0x0: Force nRTS output to inactive (high).
0x1: Force nRTS output to active (low).
0 DTR 0: Force DTR output (used in loop back mode) to RW 0
inactive (high)
1: Force DTR output (used in loop back mode) to active
(low)
Table 19-60. Register Call Summary for Register MCR_REG
UART/IrDA/CIR Environment
• UART Interface Description : [0] [1]
UART/IrDA/CIR Functional Description
• Register Access Modes : [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
• UART/IrDA (SIR, MIR, FIR)/CIR Mode Selection : [12] [13] [14] [15] [16] [17]
• UART Mode : [18] [19]
UART/IrDA/CIR Basic Programming Model
• Quick start : [20] [21] [22] [23] [24]
• Hardware and Software Flow Control Configuration : [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36]
• SIR Mode : [37]
• MIR Mode : [38] [39] [40] [41] [42]
UART/IrDA/CIR Register Manual
• UART/IrDA/CIR Register Summary : [43] [44]
• UART/IrDA/CIR Register Description : [45] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55] [56]
Table 19-61. XON1_ADDR1_REG
Address Offset 0x010
Physical Address
See Table 19-39 to Table 19-40
Description UART mode: XON1 character, IrDA mode: ADDR1 address
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED XON_WORD1
Bits Field Name Description Type Reset
31:8 Reserved Read returns 0 R 0x000000
7:0 XON_WORD1 Used to store the 8-bit XON1 character in UART modes RW 0x00
and ADDR1 address 1 for IrDA modes
2944 UART/IrDA/CIR SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated