Texas Instruments OMAP36 Series, Technical Reference Manual

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Display Subsystem Use Cases and Tips
Table 7-108. Configure DSI_PHY Timing (continued)
Steps Register/Bit Field/Programming Value
DSI_PHY_REGISTER2 [7:0] REG_TCLKPREPARE ceil(65 ns/DDR clock period)
DSI_PHY_REGISTER1 [7:0] REG_TCLKZERO ceil(265 ns/DDR clock period)
ceil(60 ns/DDR clock period) +
DSI_PHY_REGISTER1 [15:8] REG_TCLKTRAIL
2
DSI_PHY_REGISTER1 [20:16] REG_TLPXBY2 ceil(25ns/DDR clock period)
NOTE: Keep Reserved bits at reset value in the DSI_PHY_REGISTER1 and
DSI_PHY_REGISTER2 registers.
7.6.5.1.2.6 Drive Stop State
Table 7-109 lists the steps to drive the stop state.
Table 7-109. Drive Stop State
Steps Register/Bit Field/Programming Value
Force TX stop mode. DSI_TIMING1 [15] FORCE_TX_STOP_MODE_IO 0x1
Wait until FORCE_TX_STOP_MODE_IO =
DSI_TIMING1 [15] FORCE_TX_STOP_MODE_IO
0.
7.6.5.1.3 Initialization of the External MIPI LCD Controller
Table 7-110 lists the steps to initialize the external MIPI LCD controller.
Table 7-110. Initialization of the External MIPI LCD Controller
Steps Register/Bit Field/Programming Value
Reset the MIPI LCD controller using
– 0x1
GPIO87.
Wait until initialization of the external MIPI
– –
LCD controller is finished after power up.
Configure the external MIPI LCD controller. – –
7.6.5.1.4 Configure the DISPC
7.6.5.1.4.1 Reset DISPC
Table 7-111 lists the steps to reset the DISPC.
Table 7-111. Reset DISPC
Steps Register/Bit Field/Programming Value
Reset the DISPC. DISPC_SYSCONFIG [1] SOFTRESET 0x1
Wait until RESETDONE = 1. DISPC_SYSCONFIG [0] RESETDONE
Disable master interface power
DISPC_SYSCONFIG [13:12] MIDLEMODE 0x1
management.
Disable slave interface power management. DISPC_SYSCONFIG [4:3] SIDLEMODE 0x1
Disable all DISPC interrupts. DISPC_IRQENABLE [31:0] 0x0
7.6.5.1.4.2 Configure DISPC Timing, Window, and Color
Table 7-112 lists the steps to configure the DISPC registers. Table 7-95 lists the steps to configure the
color space coefficient registers.
Table 7-113 lists the steps to configure DISPC_CONTROL .
1809 SWPU177N – December 2009 – Revised November 2010 Display Subsystem
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