Texas Instruments OMAP36 Series, Technical Reference Manual

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IVA2.2 Subsystem Register Manual
Table 5-698. VIDEOSYSC_IRQCLR
Address Offset 0x0000 0044
Physical Address 0x0009 C044 Instance VIDEOSYSC
Description This register is used to clear the interrupt bits in VIDEOSYSC_IRQSTATE write 0: no effect write 1: clears the
corresponding bit in the VIDEOSYSC_IRQSTATE register and clears the interrupt line if this action clears last
active and enabled (in VIDEOSYSC_IRQMASK ) input event(s). reads always return 0
Type w/1toSet
Bits Field Name Description Type Reset
31:8 RESERVED Reserved (not implemented) w/1toSet 0x000000
7 SPARE_1 Spare interrupt (reserved for future use) w/1toSet 0x0
6 SEQ_MBX SEQ Mailbox IRQ clear w/1toSet 0x0
5 DMA_ERROR DMA error IRQ clear w/1toSet 0x0
4 HOST_ERROR HOST error IRQ clear w/1toSet 0x0
3 SPARE_0 Spare interrupt (reserved for future use) w/1toSet 0x0
2 IVLCD iVLCD IRQ clear w/1toSet 0x0
1 iLF iLF IRQ clear w/1toSet 0x0
0 iME iME IRQ clear w/1toSet 0x0
Table 5-699. Register Call Summary for Register VIDEOSYSC_IRQCLR
IVA2.2 Subsystem Functional Description
• Video Accelerator/Sequencer SYSC : [0]
IVA2.2 Subsystem Basic Programming Model
• Video and Sequencer Module interrupt Handling : [1]
IVA2.2 Subsystem Register Manual
• Video System Controller Register Mapping Summary : [2]
Table 5-700. VIDEOSYSC_IRQSET
Address Offset 0x0000 0048
Physical Address 0x0009 C048 Instance VIDEOSYSC
Description This register is used to set the interrupt bits (used to test interrupt): write 0: no effect write 1: sets the
corresponding bit in the
VIDEOSYSC_IRQSTATE register, and triggers the interrupt line if not already active and
the associated event is enabled in VIDEOSYSC_IRQMASK reads always return 0
Type w/1toSet
Bits Field Name Description Type Reset
31:8 RESERVED Reserved (not implemented) w/1toSet 0x000000
7 SPARE_1 Spare interrupt (reserved for future use) w/1toSet 0x0
6 SEQ_MBX SEQ Mailbox IRQ set w/1toSet 0x0
5 DMA_ERROR DMA error IRQ set w/1toSet 0x0
4 HOST_ERROR HOST error IRQ set w/1toSet 0x0
3 SPARE_0 Spare interrupt (reserved for future use) w/1toSet 0x0
2 IVLCD iVLCD IRQ set w/1toSet 0x0
1 iLF iLF IRQ set w/1toSet 0x0
0 iME iME IRQ set w/1toSet 0x0
Table 5-701. Register Call Summary for Register VIDEOSYSC_IRQSET
IVA2.2 Subsystem Functional Description
• Video Accelerator/Sequencer SYSC : [0]
IVA2.2 Subsystem Register Manual
• Video System Controller Register Mapping Summary : [1]
1053 SWPU177N – December 2009 – Revised November 2010 IVA2.2 Subsystem
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