No
The data lines are in use
Read the MMCi.MMCHS_PSTATE[1]
DATI bit
DATI = 0x0
Yes
The data lines are not in use
Set transfer parameters
MMCi.MMCHS_CON[12] CEATA and
MMCi.MMCHS_IE[8]CIRQ_ENABLE bits
must be set to 0x1
Read the MMCi.MMCHS_PSTATE[0]
CMDI bit
No
The command line is in use;
Issuing a command is not allowed
CMDI = 0x0
Yes
The command line is not in use;
Issuing a command is allowed
Send a CE-ATA command transfer
(see the CE-ATA standard specification)
The MMCi.MMCHS_CMD[2]ACEN bit
must be set to 0x1
Is there any error
Set MMCi.MMCHS_SYSCTL[26] SRD
and MMCi.MMCHS_SYSCTL[25] SRC
bits to 0x1 and wait until they return to
0x0
End
Yes
No
(BRR or BWR) = 0x1
Read the MMCi.MMCHS_STAT
register
Yes
(DEB or DCRC
or DTO) = 0x1
No
Do
you want to activate
the CCSD
No
Set MMCi.MMCHS_CON[2]HR bit to
0x1
Yes
No
Depends if it is a
Write or a Read
operation
Start
No
Read the MMCi.MMCHS_STAT
register
CIRQ = 0x1
End
Yes
CCS signal received
No
When CCSD is activatied,
software must not wait for
the CIRQ interrupt to finish
End
Read/write BLEN bytes from/into the
MMCi.MMCHS_DATA register
(BLEN/4 +1 register accesses)
Yes
There was an error during
the data transfer
Set MMCi.MMCHS_SYSCTL[26] SRD
bit to 0x1 and wait until it returns to 0x0
End
Clear MMCi.MMCHS_CON[2]HR bit to
0x0
Transfer type
Finite
Is it the last block
Infinite
No
This count is done
by software
Read the MMCi.MMCHS_STAT
register
TC = 0x1
Is CCSD activated
Yes
Yes
No
Set MMCi.MMCHS_SYSCTL[26] SRD
bit to 0x1 and wait until it returns to 0x0
(DEB or DCRC
or DTO) = 0x1
Yes
There was an error
during the data transfer
Yes
B
Send an empty command
The MMCi.MMCHS_ARG and
MMCi.MMCHS_CMD registers
must be set to 0x0000 0000
A
A
B
B
B
No
mmchs-037
Public Version
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MMC/SD/SDIO Basic Programming Model
24.5.2.5 Read/Write Transfer Flow in CE-ATA Mode
describes the read and write CE-ATA protocol when in Polling mode.
Figure 24-40. MMC/SD/SDIO Controller Read/Write in CE-ATA Mode
CAUTION
CE-ATA protocol is only supported by MMC cards.
In CE-ATA mode, issuing command during the transfer (except a CCSD
command) is not allowed
In CE-ATA mode, infinite transfers are not allowed, only finite transfers are
permitted.
24.5.2.6 Suspend-Resume Flow
The suspend and resume feature is only supported by SDIO cards.
24.5.2.6.1 Suspend Flow
describes the suspend flow for SDIO cards.
3405
SWPU177N – December 2009 – Revised November 2010
MMC/SD/SDIO Card Interface
Copyright © 2009–2010, Texas Instruments Incorporated