Texas Instruments OMAP36 Series, Technical Reference Manual

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SCM Programming Model
0: CLKR is from the pin mcbsp1_clkr.
1: CLKR is from the pin mcbsp1_clkx.
• CONTROL. CONTROL_DEVCONF0 [2] MCBSP1_CLKS bit:
0: CLKS is from the PRCM functional clock.
1: CLKS is from the pin mcbsp_clks.
For more details on McBSP, see Chapter 21 , McBSP.
13.5.1.4 McBSP2 Internal Clock
The McBSP2 internal clock gates the internal interconnect clock and selects the FSR, CLKR, and CLKS
input for the McBSP2. The McBSP2 does not have mcbsp2_clkr and mcbsp2_fsr external pins. Clock
input is from the mcbsp2_clkx pin; FSR input is from the mcbsp2_fsx pin.
•
CONTROL. CONTROL_DEVCONF0 [6] MCBSP2_CLKS bit:
0: Clock is from the PRCM functional clock.
1: Clock is from the external pin mcbsp_clks.
For more information about McBSP, see Chapter 21 , McBSP.
13.5.1.5 McBSP3 Internal Clock
The McBSP3 internal clock gates the internal interconnect clock and selects the FSR, CLKR, and CLKS
input for the McBSP3. The McBSP3 does not have mcbsp3_clkr and mcbsp3_fsr external pins. Clock
input is from the mcbsp3_clkx pin; FSR input is from the mcbsp3_fsx pin.
•
CONTROL. CONTROL_DEVCONF1 [0] MCBSP3_CLKS bit:
0: Clock is from the PRCM functional clock.
1: Clock is from the external pin mcbsp_clks.
For more information about McBSP, see Chapter 21 , McBSP.
13.5.1.6 McBSP4 Internal Clock
The McBSP4 internal clock gates the internal interconnect clock and selects the FSR, CLKR, and CLKS
input for the McBSP4. The McBSP4 does not have mcbsp4_clkr and mcbsp4_fsr external pins. Clock
input is from the mcbsp4_clkx pin; FSR input is from the mcbsp4_fsx pin.
•
CONTROL. CONTROL_DEVCONF1 [2] MCBSP4_CLKS bit:
0: Clock is from the PRCM functional clock.
1: Clock is from the external pin mcbsp_clks.
For more information about McBSP, see Chapter 21 , McBSP.
13.5.1.7 McBSP5 Internal Clock
The McBSP5 internal clock gates the internal interconnect clock and selects the FSR, CLKR, and CLKS
input for the McBSP5. The McBSP5 does not have mcbsp5_clkr and mcbsp5_fsr external pins. Clock
input is from the mcbsp5_clkx pin; FSR input is from the mcbsp5_fsx pin.
•
CONTROL. CONTROL_DEVCONF1 [4] MCBSP5_CLKS bit:
0: Clock is from the PRCM functional clock.
1: Clock is from the external pin mcbsp_clks.
For more information about McBSP, see Chapter 21 , McBSP.
13.5.1.8 MMC/SD/SDIO2 Module Input Clock Selection
• CONTROL. CONTROL_DEVCONF1 [6] MMCSDIO2ADPCLKISEL bit:
0: Input clock is from the external pin.
1: Internal loopback, module input clock is copied from the module output clock.
2531 SWPU177N – December 2009 – Revised November 2010 System Control Module
Copyright © 2009–2010, Texas Instruments Incorporated