Device
SDMA
Companion
devices
sys_boot[5:0]
System control
module
S_DMA_[95:0]
sys_ndmareq[3:0]
Device
modules
96
SENS_DMA_REQ[3:0]
For observability
purpose
hw_dbg[17:0]
scm-002
Public Version
www.ti.com
SCM Environment
shows an overview of the SCM environment.
Figure 13-2. SCM Environment Overview
The four sys_ndmareq [3:0] pins are optional external direct memory access (DMA) requests that can be
managed directly by the sDMA controller. The SCM can configure these requests to either level sensitive
(active low) or edge sensitive (falling edge) through the correct setting of the SENSDMAREQN bit (where
N is between 0 and 3).
The sys_boot[5:0] pins are read-accessible in a status register (SYSBOOT field
CONTROL.
[5:0]) following a POR. The SCM does not use sys_boot[6] (for more
information, see
, Power, Reset, and Clock Management).
With the correct pad configuration, the SCM maps the hw_dbg[17:0] pins at the device boundary to
observe hardware debug signals from device modules. The internal observable signals are PRCM signals,
DMA requests, and interrupts.
2437
SWPU177N – December 2009 – Revised November 2010
System Control Module
Copyright © 2009–2010, Texas Instruments Incorporated
