Texas Instruments OMAP36 Series, Technical Reference Manual

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Table 13-83. CONTROL_PADCONF_CAPABILITIES (continued)
REGISTER NAME Pad name Physical address WakeUpx Off Mode Input Reserved PU/PD MuxMode
Enable
CONTROL_PADCONF_SDRC_A10[31:16] sdrc_a11 0x480025B8 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_A12[15:0] sdrc_a12 0x480025BC -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_A12[31:16] sdrc_a13 0x480025BC -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_A14[15:0] sdrc_a14 0x480025C0 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_A14[31:16] sdrc_ncs0 0x480025C0 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_NCS1[15:0] sdrc_ncs1 0x480025C4 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_NCS1[31:16] sdrc_nclk 0x480025C4 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_NRAS[15:0] sdrc_nras 0x480025C8 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_NRAS[31:16] sdrc_ncas 0x480025C8 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_NWE[15:0] sdrc_nwe 0x480025CC -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_NWE[31:16] sdrc_dm0 0x480025CC -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_DM1[15:0] sdrc_dm1 0x480025D0 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_DM1[31:16] sdrc_dm2 0x480025D0 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_DM3[15:0] sdrc_dm3 0x480025D4 -- ----- – 0b000 0b00 ---
CONTROL_PADCONF_SDRC_DM3[31:16] un-used 0x480025D4 -- ----- – 0b000 -- ---
CONTROL_PADCONF_ETK_CLK[15:0] etk_clk 0x480025D8 0b00 0b00000 0b1 0b000 0b11 0b100
CONTROL_PADCONF_ETK_CLK[31:16] etk_ctl 0x480025D8 0b00 0b00000 0b1 0b000 0b11 0b100
CONTROL_PADCONF_ETK_D0[15:0] etk_d0 0x480025DC 0b00 0b00000 0b1 0b000 0b11 0b100
CONTROL_PADCONF_ETK_D0[31:16] etk_d1 0x480025DC 0b00 0b00000 0b1 0b000 0b11 0b100
CONTROL_PADCONF_ETK_D2[15:0] etk_d2 0x480025E0 0b00 0b00000 0b1 0b000 0b11 0b100
CONTROL_PADCONF_ETK_D2[31:16] etk_d3 0x480025E0 0b00 0b00000 0b1 0b000 0b11 0b100
CONTROL_PADCONF_ETK_D4[15:0] etk_d4 0x480025E4 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D4[31:16] etk_d5 0x480025E4 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D6[15:0] etk_d6 0x480025E8 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D6[31:16] etk_d7 0x480025E8 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D8[15:0] etk_d8 0x480025EC 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D8[31:16] etk_d9 0x480025EC 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D10[15:0] etk_d10 0x480025F0 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D10[31:16] etk_d11 0x480025F0 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D12[15:0] etk_d12 0x480025F4 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D12[31:16] etk_d13 0x480025F4 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D14[15:0] etk_d14 0x480025F8 0b00 0b00000 0b1 0b000 0b01 0b100
CONTROL_PADCONF_ETK_D14[31:16] etk_d15 0x480025F8 0b00 0b00000 0b1 0b000 0b01 0b100
2566System Control Module SWPU177N – December 2009 – Revised November 2010
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