Public Version
IVA2.2 Subsystem Register Manual
www.ti.com
Table 5-560. VLCD_MPEG_Q
Address Offset
0x0000 1054
Physical Address
0x0008 1054
Instance
iVLCD
Description
This register sets the quantization value used in MPEG.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
MQ
Bits
Field Name
Description
Type
Reset
31:8
RESERVED
Write 0s for future compatibility
RW
0x00
Read returns 0
7:0
MQ
quant_scale
RW
0x00
Table 5-561. Register Call Summary for Register VLCD_MPEG_Q
IVA2.2 Subsystem Register Manual
•
iVLCD Register Mapping Summary
Table 5-562. VLCD_MPEG_DELTA_Q
Address Offset
0x0000 1058
Physical Address
0x0008 1058
Instance
iVLCD
Description
This register sets the delta value used in MPEG quantization
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
MDELQ
Bits
Field Name
Description
Type
Reset
31:9
RESERVED
Write 0s for future compatibility
RW
0x00
Read returns 0
8:0
MDELQ
Number of delta values
RW
0x000
2's complement
Table 5-563. Register Call Summary for Register VLCD_MPEG_DELTA_Q
IVA2.2 Subsystem Basic Programming Model
•
Setting Up Registers for Q/IQ Operation
IVA2.2 Subsystem Register Manual
•
iVLCD Register Mapping Summary
Table 5-564. VLCD_MPEG_DELTA_IQ
Address Offset
0x0000 105C
Physical Address
0x0008 105C
Instance
iVLCD
Description
This register sets the delta value used in MPEG inverse quantization
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
MDELIQ
1016
IVA2.2 Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated