Texas Instruments OMAP36 Series, Technical Reference Manual

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Watchdog Timer Register Manual
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Bits Field Name Description Type Reset
31:5 Reserved Reads return 0 R 0x0
4 W_PEND_WSPR Write pending for register WSPR R 0
0x0: No Start-Stop Register write pending
0x1: Start-Stop Register write pending
3 W_PEND_WTGR Write pending for register WTGR R 0
0x0: No Trigger Register write pending
0x1: Trigger Register write pending
2 W_PEND_WLDR Write pending for register WLDR R 0
0x0: No Load Register write pending
0x1: Load Register write pending
1 W_PEND_WCRR Write pending for register WCRR R 0
0x0: No Counter Register write pending
0x1: Counter Register write pending
0 W_PEND_WCLR Write pending for register WCLR R 0
0x0: No Control Register write pending
0x1: Control Register write pending
Table 16-88. Register Call Summary for Register WWPS
Watchdog Timer Register Manual
• WDT Register Mapping Summary : [0] [1]
Table 16-89. WSPR
Address Offset 0x048
Physical Address 0x4831 4048 Instance WDTIMER2
0x4903 0048 WDTIMER3
Description This register holds the start-stop value that controls the internal start-stop FSM.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
WSPR_VALUE
Bits Field Name Description Type Reset
31:0 WSPR_VALUE The value of the start/stop register RW 0x00000000
Table 16-90. Register Call Summary for Register WSPR
Watchdog Timers
• General WDT Operation : [0]
• Prescaler Value/Timer Reset Frequency : [1] [2]
• Start/Stop Sequence for WDTs (Using WDTi.WSPR Register) : [3] [4] [5] [6] [7] [8]
• Modifying Timer Count/Load Values and Prescaler Setting : [9]
Watchdog Timer Register Manual
• WDT Register Mapping Summary : [10] [11]
• WDT Register Descriptions : [12]
2762 Timers SWPU177N – December 2009 – Revised November 2010
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