Texas Instruments OMAP36 Series, Technical Reference Manual

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IVA2.2 Subsystem Register Manual
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Table 5-438. Register Call Summary for Register TPTCj_PBIDX
IVA2.2 Subsystem Functional Description
• EDMA : [0]
IVA2.2 Subsystem Register Manual
• TPTC0 and TPTC1 Register Mapping Summary : [1]
Table 5-439. TPTCj_PMPPRXY
Address Offset 0x214
Physical address 0x01C1 0214 Instance IVA2.2 TPTC0
Physical address 0x01C1 0614 Instance IVA2.2 TPTC1
Description Prog Set Mem Protect Proxy
Type R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved Reserved PRIVID
PRIV
Bits Field Name Description Type Reset
31:9 Reserved Read returns 0. R 0x000000
8 PRIV Privilege Level: R 0
PRIV = 0: User level privilege
PRIV = 1: Supervisor level privilege
PMPPRXY.PRIV is always updated with the value from the
configuration bus Privilege field on any/every write to Program Set
BIDX Register (trigger register). The PRIV value for the SA Set and
DF Set are copied from the value in the Program set along with the
remainder of the parameter values. The privilege ID is issued on the
VBusM read and write command bus such that the target endpoints
can perform memory protection checks based on the PRIV of the
external host that sets up the DMA transaction.
7:4 Reserved Read returns 0. R 0x0
3:0 PRIVID Privilege ID: R 0x0
PMPPRXY.PRIVID is always updated with the value from
configuration bus Privilege ID field on any/every write to Program Set
BIDX Register (trigger register). The PRIVID value for the SA Set
and DF Set are copied from the value in the Program set along with
the remainder of the parameter values. The privilege ID is issued on
the VBusM read and write command bus such that the target
endpoints can perform memory protection checks based on the
privid of the external host that sets up the DMA transaction.
Table 5-440. Register Call Summary for Register TPTCj_PMPPRXY
IVA2.2 Subsystem Functional Description
• EDMA : [0]
IVA2.2 Subsystem Register Manual
• TPTC0 and TPTC1 Register Mapping Summary : [1]
968 IVA2.2 Subsystem SWPU177N – December 2009 – Revised November 2010
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