Public Version
General-Purpose Interface Register Manual
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Table 25-28. Register Call Summary for Register GPIO_IRQENABLE2
General-Purpose Interface Overview
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General-Purpose Interface Integration
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General-Purpose Interface Functional Description
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General-Purpose Interface Functional Description
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Synchronous Path: Interrupt Request Generation
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Asynchronous Path: Wake-Up Request Generation
General-Purpose Interface Basic Programming Model
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Involved Configuration Registers
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Data Input (Capture)/Output (Drive)
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General-Purpose Interface Register Manual
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General-Purpose Interface Register Mapping Summary
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Table 25-29. GPIO_CTRL
Address Offset
0x030
Physical Address
0x4831 0030
Instance
GPIO1
0x4905 0030
GPIO2
0x4905 2030
GPIO3
0x4905 4030
GPIO4
0x4905 6030
GPIO5
0x4905 8030
GPIO6
Description
This register controls the clock gating functionality.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
GATINGRATIO
DISABLEMODULE
Bits
Field Name
Description
Type
Reset
31:3
RESERVED
Read returns 0
RW
0x00000000
2:1
GATINGRATIO
Gating Ratio
RW
0x1
0x0: Functional clock is interface clock.
0x1: Functional clock is interface clock divided by 2.
0x2: Functional clock is interface clock divided by 4.
0x3: Functional clock is interface clock divided by 8.
0
DISABLEMODULE
Module Disable
RW
0x0
0x0: Module is enabled, clocks are not gated
0x1: Module is disabled, clocks are gated
Table 25-30. Register Call Summary for Register GPIO_CTRL
General-Purpose Interface Integration
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3496General-Purpose Interface
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated