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PRCM Register Manual
Table 3-362. Register Call Summary for Register PM_IVA2GRPSEL3_CORE
PRCM Functional Description
•
:
PRCM Basic Programming Model
•
PM_ <processor_name> GRPSEL_ <domain_name> (Processor Group Selection Register)
PRCM Register Manual
•
Table 3-363. PM_MPUGRPSEL3_CORE
Address Offset
0x0000 00F8
Physical Address
0x4830 6AF8
Instance
CORE_PRM
Description
This register allows selecting the group of modules that wake-up the MPU.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
RESERVED
GRPSEL_USBTLL
Bits
Field Name
Description
Type
Reset
31:3
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x00000000
2
GRPSEL_USBTLL
Select the USB TLL in the MPU wake-up events group
RW
0x1
0x0: USB TLL is not attached to the MPU wake-up
events group.
0x1: USB TLL is attached to the MPU wake-up events
group.
1:0
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x0
Table 3-364. Register Call Summary for Register PM_MPUGRPSEL3_CORE
PRCM Functional Description
•
:
PRCM Basic Programming Model
•
PM_ <processor_name> GRPSEL_ <domain_name> (Processor Group Selection Register)
PRCM Register Manual
•
3.8.2.6
SGX_PRM Registers
3.8.2.6.1 SGX_PRM Register Summary
Table 3-365. SGX_PRM Register Summary
Register Name
Type
Register Width
Address Offset
Physical Address
Reset Type
(Bits)
RW
32
0x0000 0058
0x4830 6B58
C
RW
32
0x0000 00C8
0x4830 6BC8
W
RW
32
0x0000 00E0
0x4830 6BE0
W
R
32
0x0000 00E4
0x4830 6BE4
C
RW
32
0x0000 00E8
0x4830 6BE8
C
591
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated