Texas Instruments OMAP36 Series, Technical Reference Manual

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PRCM Basic Programming Model
– CORE
• PM_WKDEP_SGX : The SGX power domain has programmable wake-up dependency with the
following domains:
– MPU
– IVA2
– WKUP
• PM_WKDEP_USBHOST : The USBHOST power domain has programmable wake-up dependency with
the following domains:
– MPU
– IVA2
– WKUP
– CORE
There is no wake-up dependency control for the WKUP power domain, because it is always on.
Because the CORE power domain wake-up dependencies are not programmable, the CORE power
domain always wakes up on a wake-up event on the following domains:
• MPU
• IVA2
• WKUP
• CAM
• DSS
• SGX
• PER
• USBHOST
3.6.2.5.4 PM_ <processor_name> GRPSEL_ <domain_name> (Processor Group Selection Register)
The processor group selection register allows defining the group of modules in the domain that can wake
up a processor domain (MPU or IVA2). This bit is effective only if the module wake-up capability is
enabled (PM_WKEN_<domain_name> register).
The device has the following processor group selection registers:
• PM_MPUGRPSEL1_CORE and PM_MPUGRPSEL3_CORE : CORE power domain modules MPU
wake-up control
• PM_IVA2GRPSEL1_CORE and PM_IVA2GRPSEL3_CORE : CORE power domain modules IVA2
wake-up control
• PM_MPUGRPSEL_PER : PER power domain modules MPU wake-up control
• PM_IVA2GRPSEL_PER : PER power domain modules IVA2 wake-up control
• PM_MPUGRPSEL_WKUP : WKUP power domain modules MPU wake-up control
• PM_IVA2GRPSEL_WKUP : WKUP power domain modules IVA2 wake-up control
• PM_MPUGRPSEL_USBHOST : HS USB Host subsystem MPU wake-up control
• PM_IVA2GRPSEL_USBHOST : HS USB Host subsystem IVA2 wake-up control
NOTE: The wake-up capability of the DSS is always attached to the MPU group; it cannot be
attached to the IVA2.2, and therefore is not programmable.
3.6.3 Reset Management Registers
3.6.3.1 Reset Control
3.6.3.1.1 PRM_RSTTIME (Reset Time Register)
The reset time register provides control over reset duration. Two durations are configurable:
413 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
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