Texas Instruments OMAP36 Series, Technical Reference Manual

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PRCM Functional Description
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3.5.4.4 Device Wake-Up Events
This section summarizes the wake-up events for each power domain. Table 3-63 through Table 3-73 list
the wake-up events, related control registers, and MPU and IVA2.2 interrupts.
Two registers, PRCM. PRM_IRQENABLE_MPU and PRCM. PRM_IRQENABLE_IVA2 , enable the MPU
and IVA2.2 interrupts. In some cases, they can also enable the wake-up feature associated with the
interrupt (DPLL recalibration requests, voltage controller and processors errors, and device wake-up
event).
NOTE:
• The PRCM module can be configured to generate an interrupt to the MPU or the IVA2
subsystem as a result of a wake-up event from the CORE, WKUP, and PER power
domain modules to the MPU and the IVA2. However, these modules can also directly
interrupt the MPU and the IVA2 subsystems. To avoid a double interrupt (from the
PRCM module and one of these modules) as the result of a single event (wakeup), one
interrupt must be masked when the other is unmasked. For more information about the
interrupt capability of a module, see the module chapter.
• The UART, GPIO, and McSPI modules generate an asynchronous wake-up event (their
interface and functional clocks can be gated during the sleep period). However, because
the GPTIMERs generate a synchronous wake-up event, they require their functional
clock to be active during the sleep period; their interface clock can be gated. McBSP
modules can generate a synchronous or asynchronous wake-up event, based on the
mode configurations. For more information about the interrupt capability of a module,
see the module chapter.
• The ability of a module to generate a wake-up event depends on the power state of the
power domain in which the module resides. If the power domain is inactive (the
functional and interface clocks of the domain are gated), only the asynchronous wake-up
modules can wake up the power domain. If only the interface clocks in the domain are
gated, synchronous and asynchronous wake-up modules can generate a wake-up event
to activate the interface clock. Similarly, if the power domain is in retention or off power
state (the domain logic is nonfunctional), no wake-up event can be generated by any
module in that power domain.
Table 3-63. MPU Power Domain Wake-Up Events
Internal Wake-Up Source PRCM Software Control Wake- Interrupt/Type Interrupt to
Events Module Up
Event
IVA2, CORE, DSS, PRCM PM_WKDEP_MPU Yes No N/A
and PER domain
dependency
Peripherals wake-up Peripherals PM_MPUGRPSEL1_CORE Yes MPU peripheral group event MPU
events occurred.
PM_MPUGRPSEL3_CORE
PM_MPUGRPSEL_WKUP
PM_MPUGRPSEL_PER
Event generator on, PRCM PM_EVGENCTRL_MPU Yes Event generator on, off MPU
off time
Forced wake-up PRCM CM_CLKSTCTRL_IVA2 No Wake-up transition is complete MPU
transition (IVA2, NEON, SGX, USBHOST,
DSS, CAM, PER, EMU domains).
CM_CLKSTCTRL_NEON
CM_CLKSTCTRL_SGX
CM_CLKSTCTRL_DSS
CM_CLKSTCTRL_CAM
CM_CLKSTCTRL_PER
CM_CLKSTCTRL_USBHOST
CM_CLKSTCTRL_EMU
356 Power, Reset, and Clock Management SWPU177N – December 2009 – Revised November 2010
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