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IVA2.2 Subsystem Register Manual
Table 5-434. Register Call Summary for Register TPTCj_PCNT
IVA2.2 Subsystem Functional Description
•
:
IVA2.2 Subsystem Register Manual
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TPTC0 and TPTC1 Register Mapping Summary
Table 5-435. TPTCj_PDST
Address Offset
0x20C
Physical address
0x01C1 020C
Instance
IVA2.2 TPTC0
Physical address
0x01C1 060C
Instance
IVA2.2 TPTC1
Description
Prog Set Dst Address
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
DADDR
Bits
Field Name
Description
Type
Reset
31:0
DADDR
Destination address for Program Register Set
RW
0x00000000
Table 5-436. Register Call Summary for Register TPTCj_PDST
IVA2.2 Subsystem Functional Description
•
:
IVA2.2 Subsystem Register Manual
•
TPTC0 and TPTC1 Register Mapping Summary
Table 5-437. TPTCj_PBIDX
Address Offset
0x210
Physical address
0x01C1 0210
Instance
IVA2.2 TPTC0
Physical address
0x01C1 0610
Instance
IVA2.2 TPTC1
Description
Prog Set B-Dim Idx
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
DBIDX
SBIDX
Bits
Field Name
Description
Type
Reset
31:16
DBIDX
Dest B-Idx for Program Register Set:
RW
0x0000
B-Idx offset between Destination arrays:
Represents the offset in bytes between the starting address of each
destination array (recall that there are BCNT arrays of ACNT
elements). DBIDX is always used, regardless of whether DAM is
Increment or FIFO mode.
15:0
SBIDX
Source B-Idx for Program Register Set:
RW
0x0000
B-Idx offset between Source arrays:
Represents the offset in bytes between the starting address of each
source array (recall that there are BCNT arrays of ACNT elements).
SBIDX is always used, regardless of whether SAM is Increment or
FIFO mode.
967
SWPU177N – December 2009 – Revised November 2010
IVA2.2 Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated