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Display Subsystem Register Manual
Bits
Field Name
Description
Type
Reset
0x1:
Stall mode selected. The Display Controller sends the
data without considering the VSYNC/HSYNC. The LCD
output is disabled at the end of the transfer of the
frame. The S/W has to re-enable the LCD output to
generate a new frame. The stall mode is used in RFBI
and DSI command modes.
10
Reserved
Reserved for non-GP devices
RW
0
9:8
TFTDATALINES
Number of lines of the LCD interface
RW
0x0
WR: VFP
0x0:
12-bit output aligned on the LSB of the pixel data
interface
0x1:
16-bit output aligned on the LSB of the pixel data
interface
0x2:
18-bit output aligned on the LSB of the pixel data
interface
0x3:
24-bit output aligned on the LSB of the pixel data
interface
7
STDITHERENABLE
Spatial temporal dithering enable
RW
0
WR: VFP
0x0:
Spatial/temporal dithering logic disabled
0x1:
Spatial/temporal dithering logic enabled
6
GODIGITAL
Digital GO Command
RW
0
0x0:
The hardware has finished updating the internal shadow
registers of the pipeline(s) associated with the digital
output using the user values. The hardware resets the
bit when the update is completed.
0x1:
Users have finished programming the shadow registers
of the pipeline(s) associated with the digital output and
the hardware can update the internal registers at the
external VSYNC.
5
GOLCD
LCD GO Command
RW
0
0x0:
The hardware has finished updating the internal shadow
registers of the pipeline(s) connected to the LCD output
using the user values. The hardware resets the bit when
the update is completed.
0x1:
Users have finished programming the shadow registers
of the pipeline(s) associated with the LCD output and
the hardware can update the internal registers at the
VFP start period.
4
M8B
Mono 8-bit mode
RW
0
WR: VFP
0x0:
Pixel data [3:0] is used to output four pixel values to the
panel at each pixel clock transition (only in Passive
Mono 8-bit mode).
0x1:
Pixel data [7:0] is used to output eight pixel values to
the panel each pixel clock transition (only in Passive
Mono 8-bit mode).
3
STNTFT
LCD display type
RW
0
WR: VFP
0x0:
Passive or Passive Matrix display operation enabled.
Passive Matrix dither logic enabled.
0x1:
Active Matrix display operation enabled. Passive Matrix
Dither logic and output FIFO bypassed.
2
MONOCOLOR
Monochrome/Color
RW
0
WR: VFP
0x0:
Color operation enabled (Passive Matrix mode only)
0x1:
Monochrome operation enabled (Passive Matrix mode
only)
1
DIGITALENABLE
Digital enable
RW
0
1831
SWPU177N – December 2009 – Revised November 2010
Display Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated
