Texas Instruments OMAP36 Series, Technical Reference Manual

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Display Subsystem Use Cases and Tips
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Table 7-112. Configure DISPC Registers
Steps Register/Bit Field/Programming Value
Configure LCD output
Set the logic clock divisor (LCD). DISPC_DIVISOR [23:16] LCD 0x1
Set the pixel clock divisor (PCD). DISPC_DIVISOR [7:0] PCD 0x4
Set the number of lines on the LCD panel. DISPC_SIZE_LCD [26:16] LPP 0x2A7
Set the number of PPL on the LCD panel. DISPC_SIZE_LCD [10:0] PPL 0x1DF
Set solid background color. DISPC_DEFAULT_COLOR0 0XFF
Configure VIDEO pipeline VID1.
DISPC_VID1_FIFO_THRESHOLD[11:0]
Set VID1 FIFO low threshold. 0x0C0
VIDFIFOLOWTHRESHOLD
DISPC_VID1_FIFO_THRESHOLD[27:16]
Set VID1 FIFO high threshold. 0xFC0
VIDFIFOHIGHTHRESHOLD
Set the X position of the VID1 window. DISPC_VID1_POSITION[10:0] VIDPOSX 0x0
Set the Y position of the VID1 window. DISPC_VID1_POSITION[26:16] VIDPOSY 0x0
Set the number of lines of the VID1 window. DISPC_VID1_SIZE[26:16] VIDSIZEY 0x2A7
Set the number of pixels of the VID1
DISPC_VID1_SIZE[10:0] VIDSIZEX 0x1DF
window.
Define the base address of the VID1 frame
DISPC_VID1_BA0 0x–
buffer.
Table 7-113. Configure DISPC_CONTROL
Comments Register/Bit Field/Programming Value
Enable pixel clock free-running. DISPC_CONTROL [27] PCLKFREEENABLE 0x1
DISPC_CONTROL [16] GPOUT1 0x1
Disable RFBI.
DISPC_CONTROL [15] GPOUT0 0x1
Enable the stall mode. DISPC_CONTROL [11] STALLMODE 0x1
Select size of DATALINES. DISPC_CONTROL [9:8] TFTDATALINES 0x3
Select active matrix display operation mode. DISPC_CONTROL [3] STNTFT 0x1
Disable LCD output interface. DISPC_CONTROL [0] LCDENABLE 0x0
Update the internal DISPC registers. DISPC_CONTROL [5] GOLCD 0x1
7.6.5.1.5 Enable Command Mode Using DISPC Video Port
Table 7-114 lists the steps to enable DISPC to send frames continuously. Two bus turnarounds (BTA)
must be generated:
• The first BTA gives bus possession to the display module.
• The second BTA obtains the TE trigger.
Table 7-114. Enable Command Mode and Automatic TE
Steps Register/Bit Field/Programming Value
Insert DCS write memory continue code. DSI_CTRL [25] DCS_CMD_CODE 0x0
Enable automatic insertion of DCS
command codes when data is sourced by
DSI_CTRL [24] DCS_CMD_ENABLE 0x1
the video port.
Enable VC1. DSI_VC1_CTRL[0] VC_EN 0x1
Enable VC0. DSI_VC0_CTRL[0] VC_EN 0x1
Enable the interface. DSI_CTRL [0] IF_EN 0x1
Wait until IF_EN = 1. DSI_CTRL [0] IF_EN
Send the sequence to receive the TE
trigger from the peripheral. In this use case,
DSI_VC1_SHORT_PACKET_HEADER[31:0] HEADER 0x0000 3515
code 0x35 + 1 parameter VC = 0, data type
= 0x15, DCS write + 1 parameter.
1810Display Subsystem SWPU177N – December 2009 – Revised November 2010
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