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MMC/SD/SDIO Register Manual
Table 24-69. MMCHS_STAT
Address Offset
0x130
Physical Address
0x4809 C130
Instance
MMCHS1
0x480A D130
MMCHS3
0x480B 4130
MMCHS2
Description
Interrupt status register
The interrupt status regroups all the status of the module internal events that can generate an interrupt.
[31:16] = Error Interrupt Status
[15:0] = Normal Interrupt Status
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserved
Reserved
TC
CC
CIE
OBI
ACE
DEB
CEB
DTO
CTO
BRR
BGE
BWR
ERRI
CIRQ
BADA
CERR
DCRC
CCRC
Reserved
Reserved
Reserved
Reserved
Bits
Field Name
Description
Type
Reset
31:30
Reserved
Reserved bit field. Do not write any value
R
0x0
29
BADA
Bad access to data space.
RW
0
This bit is set automatically to indicate a bad access to buffer when not
allowed:
- During a read access to the data register (MMCi.
) while
buffer reads are not allowed (MMCi.
[11] BRE bit =0)
- During a write access to the data register (MMCi.
) while
buffer writes are not allowed (MMCi.
[10] BWE bit=0)
Read 0x0:
No Interrupt.
Write 0x0:
Status bit unchanged
Read 0x1:
Bad Access
Write 0x1:
Status is cleared
28
CERR
Card error.
RW
0
This bit is set automatically when there is at least one error in a response of
type R1, R1b, R6, R5 or R5b. Only bits referenced as type E (error) in status
field in the response can set a card status error. An error bit in the response
is flagged only if corresponding bit in card status response error
MMCi.
in set.
There is no card error detection for autoCMD12 command. The host driver
shall read MMCi.
register to detect error bits in the
command response.
Read 0x0:
No Error
Write 0x0:
Status bit unchanged
Read 0x1:
Card error
Write 0x1:
Status is cleared
27:25
Reserved
Reserved bit field. Do not write any value
R
0x0
24
ACE
Auto CMD12 error.
RW
0
This bit is set automatically when one of the bits in Auto CMD12 Error status
register has changed from 0 to 1.
Read 0x0:
No Error
Write 0x0:
Status bit unchanged
Read 0x1:
AutoCMD12 error
Write 0x1:
Status is cleared
23
Reserved
Reserved bit field. Do not write any value
R
0
22
DEB
Data End Bit error.
RW
0
This bit is set automatically when detecting a 0 at the end bit position of read
data on mmci_dat line or at the end position of the CRC status in write
mode.
Read 0x0:
No Error
3449
SWPU177N – December 2009 – Revised November 2010
MMC/SD/SDIO Card Interface
Copyright © 2009–2010, Texas Instruments Incorporated