dss-117
INIT
INIT
Load/duplicate
pixel(s)
Phase
calculation
Phase
calculation
Load
coefficients
Number of
pixel(s) to load
Number of
line(s) to load
FIR
calculation
FIR
calculation
Accumulator
calculation
Accumulator
calculation
WAIT
Number of element(s) =
((accu + 512 + inc) >> 10) -
((accu + 512) >> 10)
Phase = accu[9:7]
7
)
(
*
)
(
)
(
> >
÷
÷
ø
ö
ç
ç
è
æ
+
=
å
=
-
=
p
i
p
i
i
n
R in
C i
n
R o u t
f
Accu = accu + inc
1: New pixel (no pixel to load)
2: New pixel (pixel(s) to load)
3: End of line
4: Restart of a line
2
3
4
1
Initialization of buffer with duplication,
accu value reset with register value
based on the field polarity if present
Public Version
www.ti.com
Display Subsystem Use Cases and Tips
Figure 7-151. Horizontal Up-/Down-Sampling Algorithm
7.6.1.3
Scaling Settings
NOTE:
•
In this section, the screen word refers to LCD panel or TV set.
•
n indicates pipeline 0 or 1 because there are two video pipelines in the DISPC.
7.6.1.3.1 Register List
The following registers define the scaling registers for the video layer n configuration:
•
DSS.
•
DSS.
•
DSS.
•
DSS.
•
DSS.
•
DSS.
•
DSS.
lists the registers for programming the vertical FIR coefficients (3-tap configuration).
Table 7-73. Vertical FIR Coefficients Corresponding
Table (3-Tap Configuration)
C
X
()
VidFIRVC
X
()
C
-1
()
VidFIRVC
2
()
C
0
()
VidFIRVC
1
()
1781
SWPU177N – December 2009 – Revised November 2010
Display Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated
