Public Version
Display Subsystem Register Manual
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Bits
Field Name
Description
Type
Reset
23:21
Reserved
Write 0s for future compatibility. Read returns 0.
RW
0x0
20:16
NBBITSPIXEL2
Number of bits
RW
0x00
Number of bits from the pixel #2 (value from 0 to 16 bits). The
values from 17 to 31 are invalid.
15:12
Reserved
Write 0s for future compatibility. Read returns 0.
RW
0x0
11:8
BITALIGNMENT
Bit alignment
RW
0x0
PIXEL1
Alignment of the bits from pixel#1 on the output interface
7:5
Reserved
Write 0s for future compatibility. Read returns 0.
RW
0x0
4:0
NBBITSPIXEL1
Number of bits
RW
0x00
Number of bits from the pixel #1 (value from 0 to 16 bits). The
values from 17 to 31 are invalid.
Table 7-231. Register Call Summary for Register DISPC_DATA_CYCLEk
Display Subsystem Functional Description
•
Display Subsystem Basic Programming Model
•
Display Controller Basic Programming Model
:
•
LCD-Specific Control Registers
•
:
Display Subsystem Register Manual
•
Display Controller Register Mapping Summary
:
Table 7-232. DISPC_VIDn_FIR_COEF_Vi
Address Offset
0x1E0+ ((–1)* 0x20) + (i*
Index
n = 1 for VID1 or 2 for VID2
0x04)
i = 0 to 7
Physical address
0x4805 05E0+ ((n-1)*0x20)
Instance
DISC
+ (i* 0x04)
Description
This bank of registers configures the down/up/down-scaling coefficients for the vertical resize of the video picture
associated with video window #n for phases 0 to 7. Shadow register, updated on VFP start period or EVSYNC.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserved
VIDFIRVC22
VIDFIRVC00
Bits
Field Name
Description
Type
Reset
31:16
Reserved
Write 0s for future compatibility. Read returns 0.
RW
0x0000
15:8
VIDFIRVC22
Signed coefficient C22 for vertical up/down-scaling with phase n
RW
0x00
7:0
VIDFIRVC00
Signed coefficient C00 for vertical up/down-scaling with phase n
RW
0x00
Table 7-233. Register Call Summary for Register DISPC_VIDn_FIR_COEF_Vi
Display Subsystem Basic Programming Model
•
Display Controller Basic Programming Model
:
•
Video Up-/Down-Sampling Configuration
:
Display Subsystem Use Cases and Tips
•
:
•
:
•
•
:
Display Subsystem Register Manual
•
Display Controller VID1 Register Mapping Summary
•
Display Controller VID2 Register Mapping Summary
1864Display Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated