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Display Subsystem Use Cases and Tips
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DSS.DISPC_VIDn_FIR_COEF_H6 = 0xF5701EFE
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DSS.DISPC_VIDn_FIR_COEF_HV6 = 0x056F0CFF
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DSS.DISPC_VIDn_FIR_COEF_H7 = 0xF87C0DFF
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DSS.DISPC_VIDn_FIR_COEF_HV7 = 0x027B0300
NOTE:
In this case, the DSS.
registers are not used.
The upsampling coefficients register configuration (both vertical and horizontal five taps) is the following:
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DSS.DISPC_VIDn_FIR_COEF_H0 = 0x00800000
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DSS.DISPC_VIDn_FIR_COEF_HV0 = 0x00800000
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DSS.DISPC_VIDn_FIR_COEF_V0 = 0x00000000
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DSS.DISPC_VIDn_FIR_COEF_H1 = 0x0D7CF800
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DSS.DISPC_VIDn_FIR_COEF_HV1 = 0x0D7CF8FF
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DSS.DISPC_VIDn_FIR_COEF_V1 = 0x0000FF00
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DSS.DISPC_VIDn_FIR_COEF_H2 = 0x1E70F5FF
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DSS.DISPC_VIDn_FIR_COEF_HV2 = 0x1E70F5FE
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DSS.DISPC_VIDn_FIR_COEF_V2 = 0x0000FEFF
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DSS.DISPC_VIDn_FIR_COEF_H3 = 0x335FF5FE
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DSS.DISPC_VIDn_FIR_COEF_HV3 = 0x335FF5FB
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DSS.DISPC_VIDn_FIR_COEF_V3 = 0x0000FBFE
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DSS.DISPC_VIDn_FIR_COEF_H4 = 0xF74949F7
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DSS.DISPC_VIDn_FIR_COEF_HV4 = 0xF7404000
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DSS.DISPC_VIDn_FIR_COEF_V04 = 0x000000F7
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DSS.DISPC_VIDn_FIR_COEF_H5 = 0xF55F33FB
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DSS.DISPC_VIDn_FIR_COEF_HV5 = 0xF55F33FE
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DSS.DISPC_VIDn_FIR_COEF_V5 = 0x0000FEFB
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DSS.DISPC_VIDn_FIR_COEF_H6 = 0xF5701EFE
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DSS.DISPC_VIDn_FIR_COEF_HV6 = 0xF5701EFF
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DSS.DISPC_VIDn_FIR_COEF_V6 = 0x0000FFFE
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DSS.DISPC_VIDn_FIR_COEF_H7 = 0xF87C0DFF
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DSS.DISPC_VIDn_FIR_COEF_HV7 = 0xF87C0D00
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DSS.DISPC_VIDn_FIR_COEF_V7 = 0x000000FF
7.6.1.3.5.2 Down-Sampling
gives the 24 coefficients to program the vertical downsampling (3-tap configuration).
Table 7-80. Down-Sampling Vertical Filter Coefficients (Three Taps)
Phases
VidFIRVC
2
()
VidFIRVC
1
()
VidFIRVC
0
()
0
36
56
36
1
40
57
31
2
45
56
27
3
50
55
23
4
18
55
55
5
23
55
50
6
27
56
45
7
31
57
40
1786Display Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated