NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1748 / 1761

A.24 Reset and Boot changes
• In External pin reset , added 'The system clock is required to be available for proper functionality of Reset Pin'
• In Lockup reset (LOCKUP) , added references to Arm Generic User Guide
RCM changes
A.25.1 Chip-specific RCM information changes
• In Chip-specific RCM information , added references to Arm Generic User Guide.
A.25.2 RCM changes
• No substantial content changes
A.26 Clock Distribution changes
• Updated the footnote "The source of HCLK ... " in Figure 25-1 .
• Added table for maximum frequencies and example configurations in Internal Clocking Requirements section
• In
Table 25-1 added footnote to 'PREDIV_SYS_CLK'
• In Table 25-1 , added note "Configuring DIVSLOW_CLK to lower frequencies ..."
• In Module clocks , updated diagram for TPIU
SCG changes
A.27.1 Chip-specific SCG information changes
• In Chip-specific SCG information , added notes ' SCG_SIRCCSR[SIRCLPEN] bit ...' and 'SCG_SIRCCSR[SIRCSTEN]
bit field ... '
• In Oscillator and SPLL guidelines , 'before disabling SOSC'
• Updated SYstem clock and clock monitor requirement
• In Supported frequency ranges , removed SCG_FIRCCFG[RANGE] as the applicable range is mentioned in the
register
A.25
A.27
Reset and Boot changes
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1748 NXP Semiconductors