NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 194 / 1761

If Then
A pin is configured for the GPIO function and the
corresponding port data direction register bit is clear. The pin is configured as an input.
A pin is configured for the GPIO function and the
corresponding port data direction register bit is set. The pin is configured as an output and the logic state of the
pin is equal to the corresponding port data output register.
To facilitate efficient bit manipulation on the general-purpose outputs, pin data set, pin
data clear, and pin data toggle registers exist to allow one or more outputs within one port
to be set, cleared, or toggled from a single register write.
The corresponding Port Control and Interrupt module does not need to be enabled to
update the state of the port data direction registers and port data output registers including
the set/clear/toggle registers.
Functional description
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
194 NXP Semiconductors