NXP Semiconductors MWCT101 S Series, Reference Manual

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Table 2-10. Timer modules (continued)
Module Description
Real-time clock (RTC) • 32-bit seconds counter with 32-bit alarm
• 16-bit prescaler with compensation that can correct errors between 0.12 ppm
and 3906 ppm
2.7.8 Communication interfaces
The following communication interfaces are available on this device:
Table 2-11. Communication modules
Module Description
Low-power Serial peripheral interface
(LPSPI) Synchronous serial bus for communication to an external device. LPSPI optionally
remains functional in low power modes.
Low-power Inter-integrated circuit
(LPI2C) Allows communication between a number of devices. Also supports the System
Management Bus (SMBus) Specification, version 2. LPI2C optionally remains
functional in low power modes.
Low-power Universal asynchronous
receiver/transmitters (LPUART) Asynchronous serial bus communication interface, supporting LIN master and
slave operation. LPUART optionally remains functional in low power modes.
FlexCAN The FlexCAN module is a communication controller implementing the CAN
protocol according to the ISO 11898-1 standard and CAN 2.0 B protocol
specifications.
2.7.9 Debug modules
The following Debug modules are available on this device:
Table 2-12. Debug modules
Module Description
JTAGC The JTAGC block provides the means to test chip functionality and connectivity
while remaining transparent to system logic when not in test mode. Testing is
performed via a boundary scan technique, as defined in the IEEE 1149.1-2001
standard. All data input to and output from the JTAGC block is communicated in
serial format.
Module functional categories
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
64 NXP Semiconductors