Address match operation functions in the same way for both MATCH[MA1] and
MATCH[MA2] fields.
• If only one of BAUD[MAEN1] and BAUD[MAEN2] is asserted, a marked address
is compared only with the associated match register field and data is transferred to
the receive data buffer only on a match.
• If BAUD[MAEN1] and BAUD[MAEN2] are asserted, a marked address is compared
with both match registers and data is transferred only on a match with either of the
MATCH[MA1] or MATCH[MA2] fields.
47.4.4.2.5 Idle Match operation
Idle match operation is enabled when the BAUD[MAEN1] or BAUD[MAEN2] bit is set
and BAUD[MATCFG] is equal to 01. In this function, the first character received by the
RXD pin after an idle line condition is considered an address and is compared with the
associated MATCH[MA1] or MATCH[MA2] field. The character is only transferred to
the receive buffer, and STAT[RDRF] is set, if the comparison matches. All subsequent
characters are considered to be data associated with the address and are transferred to the
receive data buffer until the next idle line condition is detected. If no address match
occurs then no transfer is made to the receive data buffer, and all following frames until
the next idle condition are also discarded. If both the BAUD[MAEN1] and
BAUD[MAEN2] bits are negated, the receiver operates normally and all data received is
transferred to the receive data buffer.
Idle match operation functions in the same way for both MATCH[MA1] or
MATCH[MA2] fields.
• If only one of BAUD[MAEN1] and BAUD[MAEN2] is asserted, the first character
after an idle line is compared only with the associated match register and data is
transferred to the receive data buffer only on a match.
• If BAUD[MAEN1] and BAUD[MAEN2] are asserted, the first character after an idle
line is compared with both MATCH[MA1] or MATCH[MA2] fields and data is
transferred only on a match with either of the fields.
47.4.4.2.6 Match On Match Off operation
Match on, match off operation is enabled when both BAUD[MAEN1] and
BAUD[MAEN2] are set and BAUD[MATCFG] is equal to 10. In this function, a
character received by the RXD pin that matches MATCH[MA1] is received and
transferred to the receive buffer, and STAT[RDRF] is set. All subsequent characters are
considered to be data and are also transferred to the receive data buffer, until a character
Functional description
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
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NXP Semiconductors
Summary of Contents for MWCT101 S Series
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Page 42: ...MWCT101xS Series Reference Manual Rev 3 07 2019 42 NXP Semiconductors...
Page 50: ...Conventions MWCT101xS Series Reference Manual Rev 3 07 2019 50 NXP Semiconductors...
Page 70: ...Aliased bit band regions MWCT101xS Series Reference Manual Rev 3 07 2019 70 NXP Semiconductors...
Page 78: ...Pinout diagrams MWCT101xS Series Reference Manual Rev 3 07 2019 78 NXP Semiconductors...
Page 96: ...WCT101xS safety concept MWCT101xS Series Reference Manual Rev 3 07 2019 96 NXP Semiconductors...
Page 130: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 130 NXP Semiconductors...
Page 284: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 284 NXP Semiconductors...
Page 430: ...Functional Description MWCT101xS Series Reference Manual Rev 3 07 2019 430 NXP Semiconductors...
Page 472: ...Application Information MWCT101xS Series Reference Manual Rev 3 07 2019 472 NXP Semiconductors...
Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
Page 818: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 818 NXP Semiconductors...
Page 960: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 960 NXP Semiconductors...
Page 992: ...ADC calibration scheme MWCT101xS Series Reference Manual Rev 3 07 2019 992 NXP Semiconductors...
Page 1348: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 1348 NXP Semiconductors...
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Page 1514: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 1514 NXP Semiconductors...
Page 1726: ...Debug and security MWCT101xS Series Reference Manual Rev 3 07 2019 1726 NXP Semiconductors...
Page 1760: ...MWCT101xS Series Reference Manual Rev 3 07 2019 1760 NXP Semiconductors...