NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1068 / 1761

CMPx_C0 field descriptions (continued)
Field Description
Enables the CFF interrupt from the CMP. When this field is set, an interrupt will be asserted when CFF is
set.
0 Interrupt is disabled.
1 Interrupt is enabled.
26
CFR
Analog Comparator Flag Rising
Detects a rising-edge on COUT, when set, during normal operation. CFR is cleared by writing 1 to it.
During Stop modes, CFR is level sensitive
0 A rising edge has not been detected on COUT.
1 A rising edge on COUT has occurred.
25
CFF
Analog Comparator Flag Falling
Detects a falling-edge on COUT, when set, during normal operation. CFF is cleared by writing 1 to it.
During Stop modes, CFF is level sensitive .
0 A falling edge has not been detected on COUT.
1 A falling edge on COUT has occurred.
24
COUT
Analog Comparator Output
Returns the current value of the Analog Comparator output, when read. The field is reset to 0 and will read
as C0[INVT] when the Analog Comparator module is disabled, that is, when C0[EN] = 0. Writes to this
field are ignored.
23–16
FPR
Filter Sample Period
Specifies the sampling period, in bus clock cycles, of the comparator output filter, when C0[SE] = 0.
Setting FPR to 0x0 disables the filter. Filter programming and latency details are provided in the CMP
functional description. This field has no effect when C0[SE ]= 1. In that case, the external SAMPLE signal
is used to determine the sampling period.
15
SE
Sample Enable
At any given time, either SE or WE can be set. If a write to this register attempts to set both, then SE is set
and WE is cleared. However, avoid writing ones to both bit locations because this "11" case is reserved.
0 Sampling mode is not selected.
1 Sampling mode is selected.
14
WE
Windowing Enable
At any given time, either SE or WE can be set. If a write to this register attempts to set both, then SE is set
and WE is cleared. However, avoid writing ones to both bit locations because this "11" case is reserved.
0 Windowing mode is not selected.
1 Windowing mode is selected.
13
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
12
PMODE
Power Mode Select
0 Low Speed (LS) comparison mode is selected.
1 High Speed (HS) comparison mode is selected, in VLPx mode, or Stop mode switched to Low Speed
(LS) mode.
Table continues on the next page...
Memory map/register definitions
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1068 NXP Semiconductors