NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1398 / 1761

Table 45-6. Resets (continued)
Software reset • Resets the LPSPI logic and registers to their default state, except for the Control Register.
• The LPSPI software reset is in the Control Register CR[RST].
FIFO resets • Resets the transmit/command FIFO and the receive FIFO.
• Control Register CR[RTF](Reset Transmit FIFO) and CR[RRF] (Reset Receive FIFO) are
write-only bits.
• After being reset,a FIFO is empty.
45.4.2 Master Mode
45.4.2.1 Transmit and Command FIFO commands
The transmit and command FIFO is a combined FIFO that includes both transmit data
words and command words.
• Transmit data words are stored to the transmit/command FIFO, by writing the
Transmit Data Register (TDR).
• Command words are stored to the transmit/command FIFO, by writing the Transmit
Command Register (TCR).
When a command word is at the top of the transmit/command FIFO, the actions that can
occur depend upon whether the LPSPI module is either busy or between frames, the
Continuous Transfer bit (TCR[CONT]), and the Continuing Command bit
(TCR[CONTC]).
Table 45-7. Possible actions when a command word is at the top of the transmit/command
FIFO
Condition Action
If the LPSPI is between frames then the command word is pulled from the FIFO, and that command word controls
all subsequent transfers.
If LPSPI is busy and the Continuous
Transfer bit (TCR[CONT]) is set or
cleared and the Continuing Command
bit (TCR[CONTC]) is cleared then the SPI frame will complete at the end of the existing word, ignoring the
FRAMESZ configuration. The command word is then pulled from the FIFO and that
command word controls all subsequent transfers (or until the next update to the
command word). Note that a command word with CONTC=0 will always terminate
(stop) the existing transfer regardless of the previous CONT value.
If the LPSPI is busy and the existing
Continuous Transfer bit (TCR[CONT]) is
set or cleared and the new Continuing
Command bit (TCR[CONTC]) value is
set then the command word must be updated at the frame boundary. The command
word is pulled from the FIFO during the last LPSPI_SCK pulse of the existing
frame (based on the FRAMESZ configuration), and the frame continues using the
new command value for the rest of the frame (or until the next update to the
command word). When the Continuing Command bit (TCR[CONTC]) is set, only
the lower 24-bits of the command word are updated. If the command word is
updated at a word boundary, then the transfer halts (stops) after that word.
Functional description
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1398 NXP Semiconductors