NXP Semiconductors MWCT101 S Series, Reference Manual, Page: 1636 / 1761

49.4.2.31.4 Fields
Field Function
31-24
Data_byte_0
Received payload corresponding to the data byte 0 under Pretended Networking mode
23-16
Data_byte_1
Received payload corresponding to the data byte 1 under Pretended Networking mode
15-8
Data_byte_2
Received payload corresponding to the data byte 2 under Pretended Networking mode
7-0
Data_byte_3
Received payload corresponding to the data byte 3 under Pretended Networking mode
49.4.2.32 Wake Up Message Buffer Register Data 4-7 (WMB0_D47 -
WMB3_D47)
49.4.2.32.1 Offset
Register Offset
WMB0_D47 B4Ch
WMB1_D47 B5Ch
WMB2_D47 B6Ch
WMB3_D47 B7Ch
49.4.2.32.2 Function
Each of the four WMBs contains a register to store the data bytes 4 to 7 of the payload
information of an incoming Rx message. This register's content is cleared when the
incoming matched message is either a remote frame (RTR=1) or a data frame with
DLC=0.
NOTE
The Data 4-7 registers are located at 0xB4C for WMB0, 0xB5C
for WMB1, 0xB6C for WMB2, and 0xB7C for WMB3.
Memory map/register definition
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1636 NXP Semiconductors