SCG memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_4000 Version ID Register (SCG_VERID)
32
R
0100_0000h
4006_4004 Parameter Register (SCG_PARAM)
32
R
4006_4010 Clock Status Register (SCG_CSR)
32
R
4006_4014 Run Clock Control Register (SCG_RCCR)
32
R/W
4006_4018 VLPR Clock Control Register (SCG_VCCR)
32
R/W
4006_401C HSRUN Clock Control Register (SCG_HCCR)
32
R/W
4006_4020
SCG CLKOUT Configuration Register
(SCG_CLKOUTCNFG)
32
R/W
0300_0000h
4006_4100 System OSC Control Status Register (SCG_SOSCCSR)
32
R/W
4006_4104 System OSC Divide Register (SCG_SOSCDIV)
32
R/W
0000_0000h
4006_4108 System Oscillator Configuration Register (SCG_SOSCCFG)
32
R/W
0000_0010h
4006_4200 Slow IRC Control Status Register (SCG_SIRCCSR)
32
R/W
0100_0005h
4006_4204 Slow IRC Divide Register (SCG_SIRCDIV)
32
R/W
0000_0000h
4006_4208 Slow IRC Configuration Register (SCG_SIRCCFG)
32
R/W
0000_0001h
4006_4300 Fast IRC Control Status Register (SCG_FIRCCSR)
32
R/W
4006_4304 Fast IRC Divide Register (SCG_FIRCDIV)
32
R/W
0000_0000h
4006_4308 Fast IRC Configuration Register (SCG_FIRCCFG)
32
R/W
0000_0000h
4006_4600 System PLL Control Status Register (SCG_SPLLCSR)
32
R/W
0000_0000h
4006_4604 System PLL Divide Register (SCG_SPLLDIV)
32
R/W
0000_0000h
4006_4608 System PLL Configuration Register (SCG_SPLLCFG)
32
R/W
0000_0000h
26.3.1 Version ID Register (SCG_VERID)
Note: Writing to this register will result in a transfer error.
Address: 4006_4000h base + 0h offset = 4006_4000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 26 System Clock Generator (SCG)
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors
533
Summary of Contents for MWCT101 S Series
Page 2: ...MWCT101xS Series Reference Manual Rev 3 07 2019 2 NXP Semiconductors...
Page 42: ...MWCT101xS Series Reference Manual Rev 3 07 2019 42 NXP Semiconductors...
Page 50: ...Conventions MWCT101xS Series Reference Manual Rev 3 07 2019 50 NXP Semiconductors...
Page 70: ...Aliased bit band regions MWCT101xS Series Reference Manual Rev 3 07 2019 70 NXP Semiconductors...
Page 78: ...Pinout diagrams MWCT101xS Series Reference Manual Rev 3 07 2019 78 NXP Semiconductors...
Page 96: ...WCT101xS safety concept MWCT101xS Series Reference Manual Rev 3 07 2019 96 NXP Semiconductors...
Page 130: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 130 NXP Semiconductors...
Page 284: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 284 NXP Semiconductors...
Page 430: ...Functional Description MWCT101xS Series Reference Manual Rev 3 07 2019 430 NXP Semiconductors...
Page 472: ...Application Information MWCT101xS Series Reference Manual Rev 3 07 2019 472 NXP Semiconductors...
Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
Page 818: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 818 NXP Semiconductors...
Page 960: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 960 NXP Semiconductors...
Page 992: ...ADC calibration scheme MWCT101xS Series Reference Manual Rev 3 07 2019 992 NXP Semiconductors...
Page 1348: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 1348 NXP Semiconductors...
Page 1366: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 1366 NXP Semiconductors...
Page 1514: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 1514 NXP Semiconductors...
Page 1726: ...Debug and security MWCT101xS Series Reference Manual Rev 3 07 2019 1726 NXP Semiconductors...
Page 1760: ...MWCT101xS Series Reference Manual Rev 3 07 2019 1760 NXP Semiconductors...
