NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 287 / 1761

15.2.3 Modes of operation
The following operating modes are available:
• Disabled mode
In this mode, the DMA channel is disabled. Because disabling and enabling of DMA
channels is done primarily via the DMA configuration registers, this mode is used
mainly as the reset state for a DMA channel in the DMA channel MUX. It may also
be used to temporarily suspend a DMA channel while reconfiguration of the system
takes place, for example, changing the period of a DMA trigger.
• Normal mode
In this mode, a DMA source is routed directly to the specified DMA channel. The
operation of the DMAMUX in this mode is completely transparent to the system.
• Periodic Trigger mode
In this mode, a DMA source may only request a DMA transfer, such as when a
transmit buffer becomes empty or a receive buffer becomes full, periodically.
Configuration of the period is done by an external periodic interrupt timer (for
example, PIT). This mode is available only for channels 0–3.
15.3 Memory map/register definition
This section provides a detailed description of all memory-mapped registers in the
DMAMUX.
15.3.1 DMAMUX register descriptions
15.3.1.1 DMAMUX Memory map
DMAMUX base address: 4002_1000h
Chapter 15 Direct Memory Access Multiplexer (DMAMUX)
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors 287