NXP Semiconductors MWCT101 S Series, Reference Manual

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50.12 DWT
The DWT provides debug functionality. It contains four comparators, each of which can
be configured as a hardware watchpoint, a PC sampler event trigger, or a data address
sampler event trigger. The first comparator, DWT_COMP0, can also compare against the
clock cycle counter, CYCCNT. The second comparator, DWT_COMP1, can also be used
as a data comparator. DWT also contains counters for:
• Clock cycles (CYCCNT)
• Folded instructions
• Load store unit (LSU) operations
• Sleep cycles
• CPI (all instruction cycles except for the first cycle)
• Interrupt overhead
An event is emitted each time a counter overflows.
The DWT can be configured to emit PC samples at defined intervals, and to emit
interrupt event information.
50.13 Debug in low-power modes
In low-power modes, in which the debug modules are kept static or powered off, the
debugger cannot gather any debug data for the duration of the low-power mode. In the
case that the debugger is held static, the debug port returns to full functionality as soon as
the low-power mode exits and the system returns to a state with active debug. In the case
that the debugger logic is powered off, the debugger is reset upon recovery and must be
reconfigured after the low power mode is exited.
Debug Power Up and System Power Up signals from the debug port are monitored by the
power mode entry logic as indications that a debugger is active. These signals can be
changed in RUN and VLPR. If the debug signal is active and the system attempts to enter
stop or VLPS, FCLK continues to run to support core register access. In these modes in
which FCLK is left active, the debug modules have access to core registers but not to
system memory resources accessed via the crossbar switch.
With debug enabled, transitions from Run directly to VLPS are not allowed and result in
the system entering Stop mode instead. Status bits within the MDM-AP Status register
can be evaluated to determine this pseudo-VLPS state. Note that with debug enabled,
transitions from Run
→
VLPR
→
VLPS are still possible but also result in the system
entering Stop mode instead.
DWT
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1724 NXP Semiconductors