21.5 Application Information
The watchdog is enabled by default after reset. To disable or reconfigure the watchdog, it
is better to be done before the first watchdog timeout. It is suggested to disable or
reconfigure the watchdog at the very beginning of the software code, e.g. beginning of
the startup or main function.
NOTE
When the watchdog is configured by user, it needs at least 2.5
periods of watchdog clock to take effect. This means interval
between two configures by user must be larger than 2.5 clocks.
NOTE
When Chip startup from BOOT ROM then jump to flash, the
watchdog would be disabled in the beginning of bootloader,
and enabled when bootloader exits. If there is any code in the
flash program want to reconfigure the watchdog, it must be run
2.5 watchdog clocks later after the bootloader exits.
To disable or reconfigure the watchdog without forcing a reset, WDOG_CS[UPDATE]
bit must be set during the initial configuration of the WDOG module. Then, the unlock
sequence can be used at any time within the timeout limit to reconfigure the watchdog.
21.5.1 Disable Watchdog
To disable the watchdog, first do unlock sequence, then unset the WDOG_CS[EN] bit.
The code snippet below shows an example for 32-bit write.
DisableInterrupts; // disable global interrupt
WDOG_CNT = 0xD928C520; //unlock watchdog
WDOG_CS &= ~WDOG_CS_EN_MASK; //disable watchdog
EnableInterrupts; //enable global interrupt
21.5.2 Disable Watchdog after Reset
All of watchdog registers are unlocked by reset. Therefore, unlock sequence is
unnecessary, but it needs to write all of watchdog registers to make the new configuration
take effect. The code snippet below shows an example of disabling watchdog after reset.
DisableInterrupts; // disable global interrupt
WDOG_CS &= ~WDOG_CS_EN_MASK; // disable watchdog
WDOG_TOVAL= 0xFFFF;
while(WDOG_CS[ULK]); // waiting for lock
while(~WDOG_CS[RCS]); // waiting for new configuration to take effect
EnableInterrupts; // enable global interrupt
Application Information
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
470
NXP Semiconductors
Summary of Contents for MWCT101 S Series
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Page 42: ...MWCT101xS Series Reference Manual Rev 3 07 2019 42 NXP Semiconductors...
Page 50: ...Conventions MWCT101xS Series Reference Manual Rev 3 07 2019 50 NXP Semiconductors...
Page 70: ...Aliased bit band regions MWCT101xS Series Reference Manual Rev 3 07 2019 70 NXP Semiconductors...
Page 78: ...Pinout diagrams MWCT101xS Series Reference Manual Rev 3 07 2019 78 NXP Semiconductors...
Page 96: ...WCT101xS safety concept MWCT101xS Series Reference Manual Rev 3 07 2019 96 NXP Semiconductors...
Page 130: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 130 NXP Semiconductors...
Page 284: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 284 NXP Semiconductors...
Page 430: ...Functional Description MWCT101xS Series Reference Manual Rev 3 07 2019 430 NXP Semiconductors...
Page 472: ...Application Information MWCT101xS Series Reference Manual Rev 3 07 2019 472 NXP Semiconductors...
Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
Page 818: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 818 NXP Semiconductors...
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Page 992: ...ADC calibration scheme MWCT101xS Series Reference Manual Rev 3 07 2019 992 NXP Semiconductors...
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Page 1726: ...Debug and security MWCT101xS Series Reference Manual Rev 3 07 2019 1726 NXP Semiconductors...
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