NXP Semiconductors MWCT101 S Series, Reference Manual

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37.11 ADC low-power modes
The ADC will be available in STOP2 mode
37.12 ADC Trigger Concept – Use Case
The FlexTimer Module (FTM) supports the counter init trigger and channel match
trigger, which could be used as a trigger input of the PDB. The PDB could then be used
to trigger other modules such as the ADC. Each ADC channel in the PDB module
supports up to 8 pre-triggers, which could be used as the ADC hardware channel
selection to precondition the ADC block prior to an actual trigger. After a pre-trigger, the
ADC trigger initiates the ADC conversion. The waveforms shown in the following
diagram illustrate the pre-trigger and trigger output of the PDB to ADC. When a PDB
pre-trigger and trigger output starts an ADC conversion, an internal lock associated with
the corresponding pre-trigger is activated. This lock becomes inactive when receiving the
COCO signal from the ADC.
HWTRIG0
INIT_TRIG
EXT_TRIG
FTM
TRGMUX_PDBx
pretrig0
ch0_pretrig0
ADC_R0
CH0
pretrig1
pretrig2
pretrig3
pretrig4
pretrig5
pretrig6
pretrig7
PDB
ch0_pretrig1
ch0_pretrig2
ch0_pretrig3
ch0_pretrig4
ch0_pretrig5
ch0_pretrig6
ch0_pretrig7
ADC_R1
ADC_R2
ADC_R3
ADC_R4
ADC_R5
ADC_R6
ADC_R7 S/H & C
on
ver
sion
ADC_SC1 A:H [COCO]
CPU
DMA_REQ
INTERRUPT
ADC
ADC_CHx
••
•
DMA
pretrig0
ch0_trig ADHWT
ADHWTS A
ADHWTS B
ADHWTS C
ADHWTS D
ADHWTS E
ADHWTS F
ADHWTS G
ADHWTS H
ACK[0:15]
trigger_in0
TRGMUX_FTMn
Figure 37-13. PWM Load Diagnosis – ADC Trigger Concept (block diagram)
ADC low-power modes
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
988 NXP Semiconductors