NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 600 / 1761

Field Function
110b - Clock option 6
111b - Clock option 7
23-4
—
This read-only bit field is reserved and always has the value 0.
3
FRAC
Peripheral Clock Divider Fraction
This read/write bit field sets the fraction multiply value for the fractional clock divider used as a clock
source. Divider output clock = Divider input clock x [(FRAC+1)/(PCD+1)].
This field can be written only when the clock is disabled (CGC = 0).
NOTE: When dividing by 1 (PCD = 000), do not set the FRAC bit; otherwise, the output clock is
disabled.
0b - Fractional value is 0.
1b - Fractional value is 1.
2-0
PCD
Peripheral Clock Divider Select
This read/write bit field is used for peripherals that require a clock divider. Divider output clock = Divider
input clock x [(FRAC+1)/(PCD+1)].
This field can be written only when the clock is disabled (CGC = 0).
000b - Divide by 1.
001b - Divide by 2.
010b - Divide by 3.
011b - Divide by 4.
100b - Divide by 5.
101b - Divide by 6.
110b - Divide by 7.
111b - Divide by 8.
27.6.22 PCC PORTA Register (PCC_PORTA)
27.6.22.1 Offset
Register Offset
PCC_PORTA 124h
27.6.22.2 Function
This register is for the PORTA module.
PCC register descriptions
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
600 NXP Semiconductors