NXP Semiconductors MWCT101 S Series, Reference Manual

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Field Function
If another fault condition is detected in an enabled fault input before the clearing sequence is completed,
the sequence is reset so FAULTF remains set after the clearing sequence is completed for the earlier
fault condition. FAULTF is also cleared when FAULTF bit of each enabled fault input is cleared.
0b - No fault condition was detected.
1b - A fault condition was detected.
6
WPEN
Write Protection Enable
The WPEN bit is the negation of the WPDIS bit. WPEN is set when 1 is written to it. WPEN is cleared
when WPEN bit is read as a 1 and then 1 is written to WPDIS. Writing 0 to WPEN has no effect.
0b - Write protection is disabled. Write protected bits can be written.
1b - Write protection is enabled. Write protected bits cannot be written.
5
FAULTIN
Fault Inputs
Represents the logic OR of the enabled fault inputs after their filter (if their filter is enabled) when fault
control is enabled.
0b - The logic OR of the enabled fault inputs is 0.
1b - The logic OR of the enabled fault inputs is 1.
4
—
Reserved
3
FAULTF3
Fault Detection Flag 3
Set by hardware when fault control is enabled, the corresponding fault input is enabled and a fault
condition is detected at the fault input.
Clear FAULTF3 by reading the FMS register while FAULTF3 is set and then writing a 0 to FAULTF3 while
there is no existing fault condition at the corresponding fault input. Writing a 1 to FAULTF3 has no effect.
FAULTF3 bit is also cleared when FAULTF bit is cleared.
If another fault condition is detected at the corresponding fault input before the clearing sequence is
completed, the sequence is reset so FAULTF3 remains set after the clearing sequence is completed for
the earlier fault condition.
NOTE: This field is not supported in every instance. The following table includes only supported
registers.
Field supported in Field not supported in
FTM0_FMS —
FTM1_FMS —
FTM2_FMS —
FTM3_FMS —
— FTM4_FMS
— FTM5_FMS
— FTM6_FMS
— FTM7_FMS
0b - No fault condition was detected at the fault input.
1b - A fault condition was detected at the fault input.
2
FAULTF2
Fault Detection Flag 2
Set by hardware when fault control is enabled, the corresponding fault input is enabled and a fault
condition is detected at the fault input.
Table continues on the next page...
Memory map and register definition
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1160 NXP Semiconductors