NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1538 / 1761

Field Function
TRGPOL 0b - Trigger active high
1b - Trigger active low
22
TRGSRC
Trigger Source
0b - External trigger selected
1b - Internal trigger selected
21-18
—
Reserved.
17-16
PINCFG
Timer Pin Configuration
Configures the direction of the Timer pin. For pins configured as an output (PINCFG=11), this field will
take effect when the register is written.
00b - Timer pin output disabled
01b - Timer pin open drain or bidirectional output enable
10b - Timer pin bidirectional output data
11b - Timer pin output
15-11
—
Reserved.
10-8
PINSEL
Timer Pin Select
Selects which pin is used by the Timer input or output. PINSEL=i will select the FXIO_Di pin. For pins
configured as an output (PINCFG=11), this field will take effect when the register is written.
7
PINPOL
Timer Pin Polarity
For pins configured as an output (PINCFG=11), this field will take effect when the register is written.
0b - Pin is active high
1b - Pin is active low
6-2
—
Reserved.
1-0
TIMOD
Timer Mode
In 8-bit baud counter mode, the lower 8-bits of the counter and compare register are used to configure
the baud rate of the timer shift clock, and the upper 8-bits are used to configure the shifter bit count.
In 8-bit PWM high mode, the lower 8-bits of the counter and compare register are used to configure the
high period of the timer shift clock, and the upper 8-bits are used to configure the low period of the timer
shift clock. The shifter bit count is configured using another timer or external signal.
In 16-bit counter mode, the full 16-bits of the counter and compare register are used to configure either
the baud rate of the shift clock or the shifter bit count.
00b - Timer Disabled.
01b - Dual 8-bit counters baud mode.
10b - Dual 8-bit counters PWM high mode.
11b - Single 16-bit counter mode.
48.3.1.20 Timer Configuration N Register (TIMCFG0 - TIMCFG3)
Memory Map and Registers
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1538 NXP Semiconductors