NXP Semiconductors MWCT101 S Series, Reference Manual, Page: 1565 / 1761

49.1.6 FlexCAN oscillator clock
FlexCAN oscillator clock is SOSCDIV2_CLK as mentioned in section Table 25-9
49.1.7 Supported baud rate
The following table details the supported baud rate for each chip in the product series.:
Chip PE clock CHI clock Number of MB Maximum achievable baud
rate
WCT101xS 16 MHz 80 MHz 32 3.2 Mbps
16 1 Mbps
WCT101xS 80 MHz 80 MHz 32 8 Mbps
16 1 Mbps
49.1.8 Requirements for entering FlexCAN modes: Freeze,
Disable, Stop
Follow the procedure described in Freeze mode entry to place the FlexCAN module in
that mode.
On this chip, the FlexCAN module cannot directly enter:
• Module Disable mode
• Stop mode
To enter these modes, the FlexCAN module must first enter Freeze mode.To enter this
mode, the FlexCAN module must first enter Freeze mode. See the following information
about each of the modes.
49.1.8.1 Freeze mode entry
See Freeze mode for details about this mode.
On this chip, the procedure to enter Freeze mode is:
1. Set both CAN_MCR[FRZ] (Freeze Enable) and CAN_MCR[HALT] (Halt) to 1.
2. Check whether CAN_MCR[MDIS] (Module Disable) is set to 1. If it is, clear it to 0.
Chapter 49 FlexCAN
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors 1565