Table 49-27. Bosch CAN 2.0B standard compliant bit time segment settings
Time segment 1
Time segment 2
Re-synchronization jump width
5 .. 10
2
1 .. 2
4 .. 11
3
1 .. 3
5 .. 12
4
1 .. 4
6 .. 13
5
1 .. 4
7 .. 14
6
1 .. 4
8 .. 15
7
1 .. 4
9 .. 16
8
1 .. 4
Note
The user must ensure the bit time settings are in compliance
with the CAN Protocol standard (ISO 11898-1).
Whenever CAN bit is used as a measure of time duration (for example, estimating the
occurrence of a CAN bit event in a message), the number of peripheral clocks in one
CAN bit (NumClkBit) can be calculated as:
NumClkBit =
x (P 1) x (P PSEG1 + PSEG2 + 4)
fCANCLK
fSYS
where:
• NumClkBit is the number of peripheral clocks in one CAN bit.
• f
CANCLK
is the Protocol Engine (PE) Clock (see
), in Hz.
• f
SYS
is the frequency of operation of the system (CHI) clock, in Hz.
• PSEG1 is the value in CTRL1[PSEG1] field.
• PSEG2 is the value in CTRL1[PSEG2] field.
• PROPSEG is the value in CTRL1[PROPSEG] field.
• PRESDIV is the value in CTRL1[PRESDIV] field.
The formula above is also applicable to the alternative CAN bit timing variables
described in the CAN Bit Timing register (CBT) and also to the CAN FD Bit Timing
register (FDCBT).
For example, 180 CAN bits = (180 x NumClkBit) peripheral clock periods.
49.5.9.8 Arbitration and matching timing
During normal reception and transmission, the matching, arbitration, move-in, and move-
out processes are executed during certain time windows inside the CAN frame, as shown
in the following figures.
Functional description
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1696
NXP Semiconductors
Summary of Contents for MWCT101 S Series
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Page 70: ...Aliased bit band regions MWCT101xS Series Reference Manual Rev 3 07 2019 70 NXP Semiconductors...
Page 78: ...Pinout diagrams MWCT101xS Series Reference Manual Rev 3 07 2019 78 NXP Semiconductors...
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Page 472: ...Application Information MWCT101xS Series Reference Manual Rev 3 07 2019 472 NXP Semiconductors...
Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
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Page 992: ...ADC calibration scheme MWCT101xS Series Reference Manual Rev 3 07 2019 992 NXP Semiconductors...
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Page 1726: ...Debug and security MWCT101xS Series Reference Manual Rev 3 07 2019 1726 NXP Semiconductors...
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