NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1486 / 1761

Field Function
15
MA1IE
Match 1 Interrupt Enable
0b - MA1F interrupt disabled
1b - MA1F interrupt enabled
14
MA2IE
Match 2 Interrupt Enable
0b - MA2F interrupt disabled
1b - MA2F interrupt enabled
13-12
—
Reserved
11
M7
7-Bit Mode Select
This bit should only be changed when the transmitter and receiver are both disabled.
0b - Receiver and transmitter use 8-bit to 10-bit data characters.
1b - Receiver and transmitter use 7-bit data characters.
10-8
IDLECFG
Idle Configuration
Configures the number of idle characters that must be received before the IDLE flag is set.
000b - 1 idle character
001b - 2 idle characters
010b - 4 idle characters
011b - 8 idle characters
100b - 16 idle characters
101b - 32 idle characters
110b - 64 idle characters
111b - 128 idle characters
7
LOOPS
Loop Mode Select
When LOOPS is set, the RXD pin is disconnected from the LPUART and the transmitter output is
internally connected to the receiver input. The transmitter and the receiver must be enabled to use the
loop function.
0b - Normal operation - RXD and TXD use separate pins.
1b - Loop mode or single-wire mode where transmitter outputs are internally connected to receiver
input (see RSRC bit).
6
DOZEEN
Doze Enable
0b - LPUART is enabled in Doze mode.
1b - LPUART is disabled in Doze mode.
5
RSRC
Receiver Source Select
This field has no meaning or effect unless the LOOPS field is set. When LOOPS is set, the RSRC field
determines the source for the receiver shift register input.
0b - Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART
does not use the RXD pin.
1b - Single-wire LPUART mode where the TXD pin is connected to the transmitter output and
receiver input.
4
M
9-Bit or 8-Bit Mode Select
0b - Receiver and transmitter use 8-bit data characters.
1b - Receiver and transmitter use 9-bit data characters.
3
WAKE
Receiver Wakeup Method Select
Determines which condition wakes the LPUART when RWU=1:
• Address mark in the bit preceding the stop bit (or bit preceding the parity bit when parity is enabled)
of the received data character, or
• An idle condition on the receive pin input signal.
0b - Configures RWU for idle-line wakeup.
1b - Configures RWU with address-mark wakeup.
Table continues on the next page...
Register definition
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1486 NXP Semiconductors