19.3.4.2 Function
The first word of the Error Injection Channel Descriptor defines a left-justified mask
field: CHKBIT_MASK. Each bit of CHKBIT_MASK specifies whether the
corresponding bit of the checkbit bus from the target RAM should be inverted or remain
unmodified on read accesses. Successful write to this field clears the corresponding error
injection channel valid bit, EICHEN[EICHnEN].
19.3.4.3 Diagram
Bits
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
19.3.4.4 Fields
Field
Function
31-25
CHKBIT_MASK
Checkbit Mask
This field defines a bit-mapped mask that specifies whether the corresponding bit of the checkbit bus
from the target RAM should be inverted or remain unmodified.
For any unique details about the mapping of CHKBIT_MASK's bits to a channel's target RAM, see the
chip-specific EIM information.
The following table shows the width and bit range of CHKBIT_MASK for each channel.
Channel
CHKBIT_MASK width (bits)
CHKBIT_MASK bit range
0
7
6-0
1
7
6-0
NOTE: Because CHKBIT_MASK is left-justified, the highest bit in the bit range is always in the position
of the most significant bit. For a CHKBIT_MASK that is 7 bits wide, CHKBIT_MASK[6] is in the
position of the most significant bit. For any CHKBIT_MASK with a smaller width, the highest bit
in that width's bit range is in the position of the most significant bit.
0b - The corresponding bit of the checkbit bus remains unmodified.
Table continues on the next page...
Chapter 19 Error Injection Module (EIM)
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors
439
Summary of Contents for MWCT101 S Series
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Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
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Page 992: ...ADC calibration scheme MWCT101xS Series Reference Manual Rev 3 07 2019 992 NXP Semiconductors...
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Page 1726: ...Debug and security MWCT101xS Series Reference Manual Rev 3 07 2019 1726 NXP Semiconductors...
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