32.5.11.7 Program Section command
The Program Section operation programs the data found in the section program buffer to
previously erased locations in the flash memory using an embedded algorithm. Data is
preloaded into the section program buffer by writing to the FlexRAM while it is set to
function as a programming acceleration RAM (see
).
The section program buffer is limited to the lower quarter of the programming
acceleration RAM (byte addresses 0x0000- 0x<1/4 * FlexRAM size>). Data written to
the remainder of the programming acceleration RAM is ignored and may be overwritten
during Program Section command execution.
CAUTION
A flash memory location must be in the erased state before
being programmed. Cumulative programming of bits (back-to-
back program operations without an intervening erase) within a
flash memory location is not allowed. Re-programming of
existing 0s to 0 is not allowed as this overstresses the device.
Table 32-34. Program Section command FCCOB requirements
FCCOB Number
FCCOB Contents [7:0]
0
0x0B (PGMSEC)
1
Flash address [23:16]
2
Flash address [15:8]
3
4
Number of double-phrases (for interleaved blocks), phrases (for non-interleaved blocks) to program
[15:8]
5
Number of double-phrases (for interleaved blocks), phrases (for non-interleaved blocks) to program
[7:0]
1. Must be 128-bit aligned (Flash address [3:0] = 0000) for interleaved flash, 64-bit aligned (Flash address [2:0] = 000) for
non-interleaved flash.
After clearing CCIF to launch the Program Section command, the FTFC will block
access to the FlexRAM and program the data residing in the Section Program Buffer into
the flash memory starting at the flash address provided.
The starting address must be unprotected (see the description of the FPROT registers) to
permit execution of the Program Section operation. Programming, which is not allowed
to cross a flash sector boundary, continues until all requested double-phrases (for
interleaved blocks), phrases (for non-interleaved blocks) have been programmed.
After the Program Section operation has completed, the CCIF flag will set and normal
access to the FlexRAM is restored. The contents of the Section Program Buffer is not
changed by the Program Section operation.
Functional description
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
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NXP Semiconductors
Summary of Contents for MWCT101 S Series
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Page 70: ...Aliased bit band regions MWCT101xS Series Reference Manual Rev 3 07 2019 70 NXP Semiconductors...
Page 78: ...Pinout diagrams MWCT101xS Series Reference Manual Rev 3 07 2019 78 NXP Semiconductors...
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Page 472: ...Application Information MWCT101xS Series Reference Manual Rev 3 07 2019 472 NXP Semiconductors...
Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
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