NXP Semiconductors MWCT101 S Series, Reference Manual

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Field Function
This read/write bit enables the interface clock for the peripheral, allowing access to the module's
registers. It also controls whether the clock selection and divider options can be modified.
0b - Clock disabled. The current clock selection and divider options are not locked and can be
modified.
1b - Clock enabled. The current clock selection and divider options are locked and cannot be
modified.
29
—
This read-only bit field is reserved. This bit can change values but is a don't-care.
28-27
—
This read-only bit field is reserved and always has the value 0.
26-24
PCS
Peripheral Clock Source Select
This read/write bit field is used for peripherals that support various clock selections.
This field can be written only when the clock is disabled (CGC = 0).
000b - Clock is off.
001b - Clock option 1
010b - Clock option 2
011b - Clock option 3
100b - Clock option 4
101b - Clock option 5
110b - Clock option 6
111b - Clock option 7
23-4
—
This read-only bit field is reserved and always has the value 0.
3
—
This read-only bit field is reserved and always has the value 0.
2-0
—
This read-only bit field is reserved and always has the value 0.
27.6.28 PCC EWM Register (PCC_EWM)
27.6.28.1 Offset
Register Offset
PCC_EWM 184h
27.6.28.2 Function
This register is for the EWM module.
Chapter 27 Peripheral Clock Controller (PCC)
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors 609