NXP Semiconductors MWCT101 S Series, Reference Manual

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11.1.3 GPIO register reset values
Following table defines the chip-specific register reset value.
Table 11-2. GPIO register reset values
Register Reset value
PDIR 0000_0020
11.2 Introduction
The general-purpose input and output (GPIO) module communicates to the processor
core via a zero wait state interface for maximum pin performance. The GPIO registers
support 8-bit, 16-bit or 32-bit accesses.
The GPIO data direction and output data registers control the direction and output data of
each pin when the pin is configured for the GPIO function. The GPIO input data register
displays the logic value on each pin when the pin is configured for any digital function,
provided the corresponding Port Control and Interrupt module for that pin is enabled.
Efficient bit manipulation of the general-purpose outputs is supported through the
addition of set, clear, and toggle write-only registers for each port output data register.
11.2.1 Features
Features of the GPIO module include:
• Port Data Input register visible in all digital pin-multiplexing modes
• Port Data Output register with corresponding set/clear/toggle registers
• Port Data Direction register
NOTE
The GPIO module is clocked by system clock.
11.2.2 Modes of operation
The following table depicts different modes of operation and the behavior of the GPIO
module in these modes.
Introduction
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
184 NXP Semiconductors