NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1192 / 1761

CNTIN = 0x0000
MOD = 0x0004
FTM counting is up
TOF bit
3 4 0 0 1 1 2 2 3 3 4 4 0 1 2
FTM counter
set TOF bit
period of FTM counter clock
period of counting = (MOD - CNTIN + 0x0001) x period of FTM counter clock
set TOF bit
set TOF bit
= (MOD + 0x0001) x period of FTM counter clock
counter event
counter event
counter event
Figure 41-9. Example of FTM up counting with CNTIN = 0x0000
Note
• FTM operation is only valid when the value of the CNTIN
register is less than the value of the MOD register, either in
the unsigned counting or signed counting. It is the
responsibility of the software to ensure that the values in
the CNTIN and MOD registers meet this requirement. Any
values of CNTIN and MOD that do not satisfy this criteria
can result in unpredictable behavior.
• MOD = CNTIN is a redundant condition. In this case, the
FTM counter is always equal to MOD and the TOF bit is
set in each rising edge of the FTM counter clock.
• When MOD = 0x0000, CNTIN = 0x0000, for example
after reset, and FTMEN = 1, the FTM counter remains
stopped at 0x0000 until a non-zero value is written into the
MOD or CNTIN registers.
• Setting CNTIN to be greater than the value of MOD is not
recommended as this unusual setting may make the FTM
operation difficult to comprehend. However, there is no
restriction on this configuration, and an example is shown
in the following figure.
Functional Description
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
1192 NXP Semiconductors