NXP Semiconductors MWCT101 S Series, Reference Manual

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• The first section, Chip-specific [module name] information, provides details such as
the number of module instances on the chip and connections between the module and
other modules. Read this section first because its content is crucial to understanding
the information in other sections of the chapter.
• The subsequent sections provide general information about the module, including its
signals, registers, and functional description.
Chapter 49
Enhanced Serial Communication Interface (eSCI)
49.1 Chip-specific eSCI information
This chip has six instances of the eSCI module. Some feature details vary between the
instances.
The following table summarizes the feature differences. The table does not list feature
details that the instances share.
Table 49-1. eSCI instance feature differences
Instance DMA support
eSCI_A and eSCI_B Yes
eSCI_C, eSCI_D, eSCI_E, and eSCI_F No: descriptions of eSCI DMA functionality do not apply to
these instances
NOTE
For eSCI_D, the single wire feature does not apply for TX/RX
via PCSA3 because this pad works only as an output.
49.2 Introduction
The eSCI block is an enhanced SCI block with a LIN master interface layer and DMA
support. The LIN master layer complies with the specifications LIN 1.3, LIN 2.0, LIN
2.1, and SAE J2602/1.
49.2.1 Bibliography
• LIN Specification Package Revision 1.3; December 12, 2002
• LIN Specification Package Revision 2.0; September 23, 2003
Sample Reference Manual
EXAMPLE
Chip-specific information
that should be read first
Beginning of general
module information
Figure 1-1. Example: chapter chip-specific information and general module information
1.3.1 Example: chip-specific information that clarifies content in
the same chapter
The example below shows chip-specific information that clarifies general module
information presented later in the chapter. In this case, the chip-specific register reset
values supercede the reset values that appear in the register diagram.
Module descriptions
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
44 NXP Semiconductors