NXP Semiconductors MWCT101 S Series, Reference Manual

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1. The IO pad states are undefined until V
DD
rises sufficiently to enable the POR circuits. The level at which this occurs will
vary from device to device, but for reference it is approximately 700 mV. After POR circuits are enabled, the IO pad states
are high impedance with weak pull devices disabled until POR release
2. While in reset, the pin behavior is same apart from reset pin. Chip drives pad low via obe=1, pue=0, till reset sequence is
complete to indicate reset to off-chip connected devices.
4.5 Signal Multiplexing sheet
IO Signal Description Input Multiplexing sheet(s) attached to the Reference Manual
contains information on pins/balls of this device.
The 'IO Signal Table' and 'Input Muxing' tabs in the sheet correspond to the signal
multiplexing information. The 'IO Signal Table' consists of all the pin muxing details and
the 'Input Muxing' specifies the priority for the input muxing where an input path is
driven by more than one pad.
WCT101xS variant specific IO Signal Description Input Multiplexing sheets attached to
the Reference Manual contains information about the pins/balls of the particular variant.
Module functionality is dependent on the availability of functional pins in a particular
package.
4.5.1 IO Signal Table
Following is an example snippet of IO Signal Table. For selecting any functionality, the
pad PCR register (refer to PORT_PCRn) needs to be configured accordingly.
Figure 4-3. IO signal table snippet
The columns of the above figure are described below:
• Port: This field in IO Signal Table specifies the PAD names of the device.
• CR(Control Register): This field specifies the name of PCR corresponding to the Port
field. On this device there are five PORT instances, namely, PTA, PTB, PTC, PTD
and PTE. Each pad has a corresponding Control Register, referred to as PCR_PTXn
Signal Multiplexing sheet
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
74 NXP Semiconductors